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MK2732-06G 参数 Datasheet PDF下载

MK2732-06G图片预览
型号: MK2732-06G
PDF下载: 下载PDF文件 查看货源
内容描述: 低相位噪声压控+乘法器 [Low Phase Noise VCXO+Multiplier]
分类和应用: 晶体外围集成电路石英晶振压控振荡器光电二极管时钟
文件页数/大小: 4 页 / 68 K
品牌: ICS [ INTEGRATED CIRCUIT SYSTEMS ]
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PRELIMINARY INFORMATION
MK2732-06
Low Phase Noise VCXO+Multiplier
Features
• Packaged in 16 pin TSSOP
• For xDSL chipsets
• For MPEG 2 decoders
• Replaces a VCXO and multiplier
• Uses an inexpensive pullable crystal
• On-chip patented VCXO with pull range of
200 ppm (±100 ppm) minimum
• VCXO tuning voltage of 0 to 3 V
• Zero ppm synthesis error in all clocks
• Full CMOS output swings with 25 mA output
drive capability at TTL levels
• Advanced, low power, sub-micron CMOS process
• 5 V operating voltage for core, ability to run
output clocks at 3.3V or 5V for easy interface
• Available in commercial and industrial temperature
versions
VDDIO
Description
The MK2732-06 is a low cost, low jitter, high
performance VCXO and PLL clock synthesizer
designed to replace expensive discrete VCXOs
and multipliers. The on-chip Voltage Controlled
Crystal Oscillator (VCXO) accepts a 0 to 3 V
input voltage to cause the output clocks to vary by
±100 ppm. Using ICS/MicroClock’s patented
VCXO and analog Phase-Locked Loop (PLL)
techniques, the device uses an inexpensive 10 MHz
to 14 MHz pullable crystal input to produce up to
three output clocks.
ICS manufactures the largest variety of clocks for
Set-top boxes and Communications. Consult ICS
to eliminate VCXOs, crystals, oscillators and
buffers from your board.
Block Diagram
VDD5
2
S1, S0
VIN
10-14 MHz
X1
pullable
crystal
X2
PLL/Clock
Synthesis
Circuitry
Voltage
Controlled
Crystal
Oscillator
Output
Buffer
CLK1
Output
Buffer
Output
Buffer
CLK2
REFCLK
OE (all outputs)
1
Revision 120600
Printed 12/21/00
Integrated Circuit Systems • 525 Race Street • San Jose • CA •95126 •(408) 295-9800tel•www.icst.com
MDS 2732-06 C