IC41C16105S
IC41LV16105S
AC CHARACTERISTICS
(Continued)
(1,2,3,4,5,6)
(Recommended Operating Conditions unless otherwise noted.)
Symbol
t
ACH
t
OEH
t
DS
t
DH
t
RWC
t
RWD
t
CWD
t
AWD
t
PC
t
RASP
t
CPA
t
PRWC
t
COH
t
O..
t
WHZ
t
CLCH
t
CSR
t
CHR
t
ORD
t
RE.
t
T
Parameter
Column-Address Setup Time to
CAS
Precharge during WRITE Cycle
OE
Hold Time from
WE
during
READ-MODI.Y-WRITE cycle
(18)
Data-In Setup Time
(15, 22)
Data-In Hold Time
(15, 22)
READ-MODI.Y-WRITE Cycle Time
RAS
to
WE
Delay Time during
READ-MODI.Y-WRITE Cycle
(14)
CAS
to
WE
Delay Time
(14, 20)
Column-Address to
WE
Delay Time
(14)
.ast Page Mode READ or WRITE
Cycle Time
(24)
RAS
Pulse Width
Access Time from
CAS
Precharge
(15)
READ-WRITE Cycle Time
(24)
Data Output Hold after
CAS
LOW
Output Buffer Turn-Off Delay from
CAS
or
RAS
(13,15,19, 29)
Output Disable Delay from
WE
Last
CAS
going LOW to .irst
CAS
returning HIGH
(23)
CAS
Setup Time (CBR RE.RESH)
(30, 20)
CAS
Hold Time (CBR RE.RESH)
(30, 21)
OE
Setup Time prior to
RAS
during
HIDDEN RE.RESH Cycle
Auto Refresh Period (1,024 Cycles)
Transition Time (Rise or .all)
(2, 3)
-50
Min. Max.
15
8
0
8
108
64
26
39
20
50
56
5
1.6
3
10
5
8
0
1
100K
30
12
10
16
50
-60
Min. Max.
15
10
0
10
133
77
32
47
25
60
68
5
1.6
3
10
5
10
0
1
100K
35
15
10
16
50
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
AC TEST CONDITIONS
Output load:
Two TTL Loads and 50 p. (Vcc = 5.0V ±10%)
One TTL Load and 50 p. (Vcc = 3.3V ±10%)
Input timing reference levels: V
IH
= 2.4V, V
IL
= 0.8V (Vcc = 5.0V ±10%);
V
IH
= 2.0V, V
IL
= 0.8V (Vcc = 3.3V ±10%)
Output timing reference levels: V
OH
= 2.0V, V
OL
= 0.8V (Vcc = 5V ±10%, 3.3V ±10%)
8
Integrated Circuit Solution Inc.
DR011-0A 05/23/2001