IC41C44002A/IC41C44002AS(L)
IC41LV44002A/IC41LV44002AS(L)
FUNCTIONAL BLOCK DIAGRAM
OE
WE
CAS
CONTROL
LOGIC
WE
CONTROL
LOGICS
OE
CONTROL
LOGIC
OE
CAS
CAS
WE
RAS
RAS
CLOCK
GENERATOR
DATA I/O BUS
REFRESH
COUNTER
DATA I/O BUFFERS
ROW DECODER
RAS
COLUMN DECODERS
SENSE AMPLIFIERS
I/O0-I/O3
MEMORY ARRAY
4,194,304 x 4
ADDRESS
BUFFERS
A0-A10
TRUTH TABLE
Function
Standby
Read
Write: Word (Early Write)
Read-Write
EDO Page-Mode Read 1st Cycle:
2nd Cycle:
EDO Page-Mode Write 1st Cycle:
2nd Cycle:
EDO Page-Mode
1st Cycle:
Read-Write
2nd Cycle:
Hidden Refresh
Read
Write
(1)
RAS-Only
Refresh
CBR Refresh
Note:
1. EARLY WRITE only.
RAS
H
L
L
L
L
L
L
L
L
L
L→H→L
L→H→L
L
H→L
CAS
H
L
L
L
H→L
H→L
H→L
H→L
H→L
H→L
L
L
H
L
WE
X
H
L
H→L
H
H
L
L
H→L
H→L
H
L
X
H
OE
X
L
X
L→H
L
L
X
X
L→H
L→H
L
X
X
X
Address t
R
/t
C
X
ROW/COL
ROW/COL
ROW/COL
ROW/COL
NA/COL
ROW/COL
NA/COL
ROW/COL
NA/COL
ROW/COL
ROW/COL
ROW/NA
X
I/O
High-Z
D
OUT
D
IN
D
OUT
, D
IN
D
OUT
D
OUT
D
IN
D
IN
D
OUT
, D
IN
D
OUT
, D
IN
D
OUT
D
IN
High-Z
High-Z
Integrated Circuit Solution Inc.
DR026-0A 09/04/2001
3