IC62LV5128L
IC62LV5128LL
512K x 8 LOW POWER and LOW V
CC
CMOS STATIC RAM
FEATURES
• Access times of 55, 70, 100 ns
• CMOS Low power operation:
—
60 mW (typical) operation
—
3 µW (typical) standby
• Low data retention voltage: 1.5V (min.)
• Output Enable (OE) and Chip Enable
(CE) inputs for ease in applications
• TTL compatible inputs and outputs
• Fully static operation:
—
No clock or refresh reguired
• Single 2.7V-3.6V power supply
• Available in the 32-pin 8*20mm TSOP-1,
32-pin 8*13.4mm TSOP-1 and 48-pin
6*8mm TF-BGA
DESCRIPTION
The
ICSI
IC62LV5128L and IC62LV5128LL is a low voltage,
524,288 words by 8 bits, CMOS SRAM. It is fabricated using
ICSI
's low voltage, six transistor (6T), CMOS technology. The
device is targeted to satisfy the demands of the state-of-the-art
technologies such as cell phones and pagers.
When
CE
is HIGH (deselected), the device assumes a standby
mode at which the power dissipation can be reduced down with
CMOS input levels. Additionally, easy memory expansion is
provided by using Chip Enable and Output Enable inputs,
CE
and
OE.
The active LOW Write Enable (
WE)
controls both
writing and reading of the memory.
The IC62LV5128L and IC62LV5128LL are available in 32-pin
8*20mm TSOP-1, 8*13.4mm TSOP-1 and 48-pin 6*8mm TF-
BGA.
FUNCTIONAL BLOCK DIAGRAM
A0-A18
DECODER
512K x 8
MEMORY ARRAY
VCC
GND
I/O
DATA
CIRCUIT
I/O0-I/O7
COLUMN I/O
CE
OE
WE
CONTROL
CIRCUIT
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
2
Integrated Circuit Solution Inc.
LPSR012-0B 08/31/2001
ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
