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IC63LV1024-8JI 参数 Datasheet PDF下载

IC63LV1024-8JI图片预览
型号: IC63LV1024-8JI
PDF下载: 下载PDF文件 查看货源
内容描述: 128K ×8高速CMOS静态RAM 3.3V革命引脚 [128K x 8 HIGH-SPEED CMOS STATIC RAM 3.3V REVOLUTIONARY PINOUT]
分类和应用: 存储静态存储器
文件页数/大小: 10 页 / 130 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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IC63LV1024
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-8 ns
Symbol
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE
Access Time
OE
Access Time
OE
to Low-Z Output
OE
to High-Z Output
CE
to Low-Z Output
CE
to High-Z Output
Min.
8
3
0
0
3
0
Max.
8
8
4
4
4
-10 ns
Min.
10
3
0
0
3
0
Max.
10
10
5
5
5
-12 ns
Min.
12
3
0
0
3
0
Max.
12
12
6
6
6
-15 ns
Min.
15
3
0
0
3
0
Max.
15
15
7
7
7
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
LZOE
(2)
t
HZOE
(2)
t
LZCE
(2)
t
HZCE
(2)
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured
±500
mV from steady-state voltage. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1a and 1b
Notes:
1. The Vcc operating range for 8 ns is 3.3V +10%, -5%.
AC TEST LOADS
317
3.3V
Z
OUT
= 50
OUTPUT
50
V
T
= 1.5V
Figure 1a.
OUTPUT
5 pF
Including
jig and
scope
351
Figure 1b.
6
Integrated Circuit Solution Inc.
AHSR025-0D
04/16/2004