IS61SP12836
READ/WRITE CYCLE SWITCHING CHARACTERISTICS
(Over Operating Range)
-
166
Symbol Parameter
f
MAX
t
KC
t
KH
t
KL
t
KQ
t
KQX
(1)
Clock Frequency
Cycle Time
Clock High Time
Clock Low Time
Clock Access Time
Clock High to Output Invalid
Min.
—
6
2.4
2.4
—
1.5
0
1.5
—
0
0
2
1.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
Max.
166
—
—
—
3.5
—
—
6
3.5
—
—
3.5
—
—
—
—
—
—
—
—
—
—
-150
Min. Max.
—
6.7
2.6
2.6
—
1.5
0
1.5
—
0
0
2
1.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
150
—
—
—
3.8
—
—
6.7
3.5
—
—
3.5
—
—
—
—
—
—
—
—
—
—
-133
Min. Max.
—
7.5
2.8
2.8
—
1.5
0
1.5
—
0
0
2
1.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
133
—
—
—
4
—
—
7.5
3.8
—
—
3.8
—
—
—
—
—
—
—
—
—
—
-117
Min. Max.
—
8.5
3.4
3.4
—
1.5
0
1.5
—
0
0
2
1.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
117
—
—
—
4
—
—
8.5
4
—
—
4
—
—
—
—
—
—
—
—
—
—
-5
Min.
—
10
4
4
—
2.5
0
1.5
—
0
0
2
1.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
Max.
100
—
—
—
5
—
—
10
5
—
—
5
—
—
—
—
—
—
—
—
—
—
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
KQLZ
(1,2)
Clock High to Output Low-Z
t
KQHZ
(1,2)
Clock High to Output High-Z
t
OEQ
t
OEQX
(1)
Output Enable to Output Valid
Output Disable to Output Invalid
t
OELZ
(1,2)
Output Enable to Output Low-Z
t
OEHZ
(1,2)
Output Disable to Output High-Z
t
AS
t
SS
t
WS
t
CES
t
AVS
t
AH
t
SH
t
WH
t
CEH
t
AVH
Address Setup Time
Address Status Setup Time
Write Setup Time
Chip Enable Setup Time
Address Advance Setup Time
Address Hold Time
Address Status Hold Time
Write Hold Time
Chip Enable Hold Time
Address Advance Hold Time
Note:
1. Guaranteed but not 100% tested. This parameter is periodically sampled.
2. Tested with load in Figure 2.
8
Integrated Circuit Solution Inc.
SSR012-0B
ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
