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IDT72235LB15PF 参数 Datasheet PDF下载

IDT72235LB15PF图片预览
型号: IDT72235LB15PF
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS SyncFIFOO 256 ×18 , 512 ×18 , 1024× 18 , 2048× 18和4096 ×18 [CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18]
分类和应用: 先进先出芯片
文件页数/大小: 16 页 / 185 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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IDT72205LB/72215LB/72225LB/72235LB/72245LB CMOS SyncFIFO™
256 x 18-BIT, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18
Commercial And Industrial Temperature Ranges
AC ELECTRICAL CHARACTERISTICS
(Commercial: V
CC
= 5V
±
10%, T
A
= 0°C to +70°C; Industrial: V
CC
= 5V
±
10%, T
A
= –40°C to +85°C)
Commercial
72205LB10
72215LB10
72225LB10
72235LB10
72245LB10
Min. Max.
2
10
4.5
4.5
3
0
3
0
10
8
8
0
3
3
3
3.5
5
5
100
6.5
15
6
6
6.5
6.5
17
17
17
6.5
Com'l & Ind'l
(1)
72205LB15
72205LB25
72215LB15
72215LB25
72225LB15
72225LB25
72235LB15
72235LB25
72245LB15
72245LB25
Min. Max. Min. Max.
2
15
6
6
4
1
4
1
15
10
10
0
3
3
6.5
5
6
6
66.7
10
20
8
8
10
10
24
24
24
10
2
25
10
10
6
1
6
1
25
15
15
0
3
3
10
10
10
10
40
15
25
12
12
15
15
26
26
26
15
Symbol
f
S
t
A
t
CLK
t
CLKH
t
CLKL
t
DS
t
DH
t
ENS
t
ENH
t
RS
t
RSS
t
RSR
t
RSF
t
OLZ
t
OE
t
OHZ
t
WFF
t
REF
t
PAF
t
PAE
t
HF
t
XO
t
XI
t
XIS
t
SKEW1
t
SKEW2
Parameter
Clock Cycle Frequency
Data Access Time
Clock Cycle Time
Clock HIGH Time
Clock LOW Time
Data Set-up Time
Data Hold Time
Enable Set-up Time
Enable Hold Time
Reset Pulse Width
(2)
Reset Set-up Time
Reset Recovery Time
Reset to Flag and Output Time
Output Enable to Output in Low-Z
(3)
Output Enable to Output Valid
Output Enable to Output in High-Z
(3)
Write Clock to Full Flag
Read Clock to Empty Flag
Clock to Programmable Almost-Full
Flag
Clock to Programmable Almost-Empty
Flag
Clock to Half-Full Flag
Clock to Expansion Out
Expansion In Pulse Width
Expansion In Set-Up Time
Skew time between Read Clock &
Write Clock for Full Flag
Skew time between Read Clock &
Write Clock for Empty Flag
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES:
1. Industrial temperature range is available as standard product for the 15ns
and the 25ns speed grade.
2. Pulse widths less than minimum values are not allowed.
3. Values guaranteed by design, not currently tested.
2766 tbl 07
5V
1.1K
D.U.T.
680Ω
30pF*
2766 drw 04
Figure 1. Output Load
* Includes jig and scope capacitances.
5