BiCMOS SyncBiFIFO™
64 x 36 x 2
IDT723612
Integrated Device Technology, Inc.
FEATURES:
• Free-running CLKA and CLKB can be asynchronous or
coincident (simultaneous reading and writing of data on a
single clock edge is permitted)
• Two independent clocked FIFOs (64 x 36 storage
capacity each) buffering data in opposite directions
• Mailbox bypass Register for each FIFO
• Programmable Almost-Full and Almost-Empty Flags
• Microprocessor interface control logic
•
EFA
,
FFA
,
AEA
, and
AFA
flags synchronized by CLKA
•
EFB
,
FFB
,
AEB
, and
AFB
flags synchronized by CLKB
• Passive parity checking on each port
• Parity generation can be selected for each port
•
•
•
•
Low-power advanced BiCMOS technology
Supports clock frequencies up to 67 MHz
Fast access times of 10ns
Available in 132-pin plastic quad flat package (PQF) or
space-saving 120-pin thin quad flat package (TQFP)
• Industrial temperature range (-40oC to +85oC) is avail-
able, tested to military electrical specifications
DESCRIPTION:
The IDT723612 is a monolithic high-speed, low-power
BiCMOS bi-directional clocked FIFO memory. It supports
clock frequencies up to 67 MHz and has read access times as
FUNCTIONAL BLOCK DIAGRAM
CLKA
W/
R
A
ENA
MBA
CSA
Port-A
Control
Logic
Mail 1
Register
Parity
Gen/Check
MBF1
PEFB
PGB
Parity
Generation
Input
Register
RST
EVEN
ODD/
64 x 36
SRAM
Output
Register
36
Device
Control
Write
Pointer
Read
Pointer
FFA
AFA
FS0
FS1
A
0
- A
35
Status Flag
Logic
36
FIFO1
Programmable Flag
Offset Register
FIFO2
Status Flag
Logic
Read
Pointer
Parity
Generation
EFB
AEB
B
0
- B
36
EFA
AEA
FFB
AFB
36
Write
Pointer
Output
Register
64 x 36
SRAM
PGA
Parity
Gen/Check
Mail 2
Register
CLKB
PEFA
MBF2
Input
Register
Port-B
Control
Logic
CSB
W/
R
B
ENB
MBB
3136 drw 01
The IDT logo is a registered trademark and Sync BiFIFO is a trademark of Integrated Device Technology Inc.
COMMERCIAL TEMPERATURE RANGE
©1997
Integrated Device Technology, Inc.
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
MAY 1997
DSC-3136/4
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