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IDT723631L30PF 参数 Datasheet PDF下载

IDT723631L30PF图片预览
型号: IDT723631L30PF
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS SyncFIFOO 512× 36 , 1024× 36 , 2048× 36 [CMOS SyncFIFOO 512 x 36, 1024 x 36, 2048 x 36]
分类和应用: 先进先出芯片
文件页数/大小: 23 页 / 273 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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CMOS SyncFIFO
512 x 36, 1024 x 36,
2048 x 36
Integrated Device Technology, Inc.
IDT723631
IDT723641
IDT723651
FEATURES:
• Free-running CLKA and CLKB can be asynchronous or
coincident (permits simultaneous reading and writing of
data on a single clock edge)
• Clocked FIFO buffering data from Port A to Port B
• Storage capacity: IDT723631 - 512 x 36
IDT723641 - 1024 x 36
IDT723651 - 2048 x 36
• Synchronous read retransmit capability
• Mailbox register in each direction
• Programmable Almost-Full and Almost-Empty flags
• Microprocessor interface control logic
• Input-Ready (IR) and Almost-Full (
AF
) flags synchronized
by CLKA
• Output-Ready (OR) and Almost-Empty (
AE
) flags syn-
chronized by CLKB
• Low-power 0.8-micron advanced CMOS technology
• Supports clock frequencies up to 67 MHz
• Fast access times of 11 ns
• Available in 132-pin plastic quad flat package (PQF) or
space-saving 120-pin thin quad flat package (TQFP)
• Industrial temperature range (-40°C to +85°C) is avail-
able, tested to military electrical specifications
DESCRIPTION:
The IDT723631/723641/723651 is a monolithic high-
speed, low-power, CMOS clocked FIFO memory. It supports
clock frequencies up to 67 MHz and has read access times as
fast as 12ns. The 512/1024/2048 x 36 dual-port SRAM FIFO
buffers data from port A to Port B. The FIFO memory has
retransmit capability, which allows previously read data to be
accessed again. The FIFO has flags to indicate empty and full
conditions and two programmable flags (almost full and al-
most empty) to indicate when a selected number of words is
FUNCTIONAL BLOCK DIAGRAM
MBF1
CLKA
Input
Register
Sync
Retransmit
Logic
RST
Reset
Logic
Output
Register
W/
R
A
ENA
MBA
CSA
Mail 1
Register
Port-A
Control
Logic
512 x 36
1024 x 36
2048 x 36
SRAM
RTM
RFM
B
0
- B
35
OR
36
A
0
- A
35
Write
Pointer
Read
Pointer
AF
FS
0/
SD
FS
1/
SEN
IR
Status Flag
Logic
AE
10
Flag Offset
Registers
CLKB
Port-B
Control
Logic
CSB
W
/RB
ENB
MBB
Mail 2
Register
MBF2
3023 drw 01
The IDT logo is a registered trademark and SyncFIFO is a trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
©1997
Integrated Device Technology, Inc.
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
MAY 1997
DSC-3023/3
1