72801/72811/72821/72831/72841 DUAL CMOS SyncFIFO™
256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9
COMMERCIAL TEMPERATURE
AC ELECTRICAL CHARACTERISTICS
(Commercial: V
CC
= 5V
±
10%, T
A
= 0°C to +70°C)
Commercial
IDT72801L12 IDT72801L15 IDT72801L20 IDT72801L25 IDT72801L35
IDT72811L12 IDT72811L15 IDT72811L20 IDT72811L25 IDT72811L35
IDT72821L12 IDT72821L15 IDT72821L20 IDT72821L25 IDT72821L35
IDT72831L12 IDT72831L15 IDT72831L20 IDT72831L25 IDT72831L35
IDT72841L12 IDT72841L15 IDT72841L20 IDT72841L25 IDT72841L35
Symbol
f
S
t
A
t
CLK
t
CLKH
t
CLKL
t
DS
t
DH
t
ENS
t
ENH
t
RS
t
RSS
t
RSR
t
RSF
t
OLZ
t
OE
t
OHZ
t
WFF
t
REF
t
PAF
t
PAE
Parameter
Clock Cycle Frequency
Data Access Time
Clock Cycle Time
Clock High Time
Clock Low Time
Data Set-up Time
Data Hold Time
Enable Set-up Time
Enable Hold Time
Reset Pulse Width
(1)
Reset Set-up Time
Reset Recovery Time
Reset to Flag Time and Output Time
Output Enable to Output in Low-Z
(2)
Output Enable to Output Valid
Output Enable to Output in
Write Clock to Full Flag
Read Clock to Empty Flag
Write Clock to Programmable
Almost-Full Flag
Read Clock to Programmable
Almost-Empty Flag
t
SKEW1
Skew Time Between Read
Clock and Write Clock
for Empty Flag and Full Flag
t
SKEW2
Skew Time Between Read Clock
and Write Clock for Programmable
Almost-Empty Flag and
Programmable Almost-Full Flag
NOTES:
1. Pulse widths less than minimum values are not allowed.
2. Values guaranteed by design, not currently tested.
Min. Max.
—
2
12
5
5
3
0
3
0
12
12
12
—
0
3
3
—
—
—
—
5
83.3
8
—
—
—
—
—
—
—
—
—
—
12
—
7
7
8
8
8
8
—
Min. Max.
—
2
15
6
6
4
1
4
1
15
15
15
—
0
3
3
—
—
—
—
6
66.7
10
—
—
—
—
—
—
—
—
—
—
15
—
8
8
10
10
10
10
—
Min. Max.
—
2
20
8
8
5
1
5
1
20
20
20
—
0
3
3
—
—
—
—
8
50
12
—
—
—
—
—
—
—
—
—
—
20
—
10
10
12
12
12
12
—
Min. Max.
—
3
25
10
10
6
1
6
1
25
25
25
—
0
3
3
—
—
—
—
10
40
15
—
—
—
—
—
—
—
—
—
—
25
—
13
13
15
15
15
15
—
Min. Max. Unit
—
3
35
14
14
8
2
8
2
35
35
35
—
0
3
3
—
—
—
—
12
28.6 MHz
20
—
—
—
—
—
—
—
—
—
—
35
—
15
15
20
20
20
20
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
High-Z
(2)
22
—
28
—
35
—
40
—
42
—
ns
3034 tbl 07
5V
1.1K
AC TEST CONDITIONS
In Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
3ns
1.5V
1.5V
See Figure 1
3034 tbl 08
D.U.T.
680Ω
30pF*
3034 drw 03
or equivalent circuit
Figure 1. Output Load
*Includes jig and scope capacitances.
5.15
5
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
