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IDT72V255LA10TF 参数 Datasheet PDF下载

IDT72V255LA10TF图片预览
型号: IDT72V255LA10TF
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3伏的CMOS SuperSync FIFO 8,192 ×18 16,384 ×18 [3.3 VOLT CMOS SuperSync FIFO 8,192 x 18 16,384 x 18]
分类和应用: 先进先出芯片
文件页数/大小: 27 页 / 436 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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IDT72V255LA/72V265LA 3.3 VOLT CMOS SuperSync FIFO™
8,192 x 18, 16,384 x 18
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS
Symbol
V
TERM
T
STG
I
OUT
Rating
Terminal Voltage
with respect to GND
Storage
Temperature
DC Output Current
Commercial
–0.5 to +5
–55 to +125
–50 to +50
Unit
V
°C
mA
RECOMMENDED DC OPERATING
CONDITIONS
Symbol
V
CC
GND
V
IH
V
IL
(1)
Parameter
Supply Voltage (Com’l/Ind’l)
Supply Voltage (Com’l/Ind’l)
Input High Voltage (Com’l/Ind’l)
Input Low Voltage (Com’l/Ind’l)
Operating Temperature
Commercial
Operating Temperature
Industrial
Min.
3.0
0
2.0
0
0
Typ.
3.3
0
Max.
3.6
0
5.0
0.8
70
85
Unit
V
V
V
V
°C
°C
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
T
A
T
A
NOTE:
1. 1.5V undershoots are allowed for 10ns once per cycle.
DC ELECTRICAL CHARACTERISTICS
(Commercial: V
CC
= 3.3V ± 0.3V, T
A
= 0°C to +70°C; Industrial: V
CC
= 3.3V
±
0.3V, T
A
= -40°C to +85°C)
IDT72V255LA
IDT72V265LA
Com’l & Ind’l
(1)
t
CLK
= 10, 15, 20 ns
Symbol
I
LI
(2)
I
LO
(3)
V
OH
V
OL
I
CC1
(4,5,6)
I
CC2
(4,7)
Parameter
Input Leakage Current
Output Leakage Current
Output Logic “1” Voltage, I
OH
= –2 mA
Output Logic “0” Voltage, I
OL
= 8 mA
Active Power Supply Current
Standby Current
Min.
–1
–10
2.4
Max.
1
10
0.4
55
20
Unit
µA
µA
V
V
mA
mA
NOTES:
1. Industrial temperature range product for 15ns speed grade is available as a standard device.
2. Measurements with 0.4
V
IN
V
CC
.
3.
OE
V
IH
, 0.4
V
OUT
V
CC
.
4. Tested with outputs disabled (I
OUT
= 0).
5. RCLK and WCLK toggle at 20 MHz and data inputs switch at 10 MHz.
6. Typical I
CC1
= 10 + 1.1*f
S
+ 0.02*C
L
*f
S
(in mA) with V
CC
= 3.3V, T
A
= 25°C, f
S
= WCLK frequency = RCLK frequency (in MHz, using TTL levels), data
switching at f
S
/2, C
L
= capacitive load (in pF).
7. All Inputs = V
CC
–0.2V or GND + 0.2V, except RCLK and WCLK, which toggle at 20 MHz.
CAPACITANCE
(T
A
= +25°C, f = 1.0MHz)
Symbol
C
IN
(2)
C
OUT
(1,2)
Parameter
(1)
Input
Capacitance
Output
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
10
10
Unit
pF
pF
NOTES:
1. With output deselected, (OE
V
IH
).
2. Characterized values, not currently tested.
5