FAST CMOS 16-BIT
BUFFER/LINE DRIVER
Integrated Device Technology, Inc.
IDT54/74FCT16244T/AT/CT/ET
IDT54/74FCT162244T/AT/CT/ET
IDT54/74FCT166244T/AT/CT
IDT54/74FCT162H244T/AT/CT/ET
FEATURES:
• Common features:
– 0.5 MICRON CMOS Technology
– High-speed, low-power CMOS replacement for
ABT functions
–
Typical t
SK
(o) (Output Skew) < 250ps
– Low input and output leakage
≤
1µA (max.)
– ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
– Extended commercial range of -40°C to +85°C
• Features for FCT16244T/AT/CT/ET:
– High drive outputs (-32mA I
OH
, 64mA I
OL
)
– Power off disable outputs permit “live insertion”
– Typical V
OLP
(Output Ground Bounce) < 1.0V at
V
CC
= 5V, T
A
= 25°C
• Features for FCT162244T/AT/CT/ET:
– Balanced Output Drivers:
±24mA
(commercial),
±16mA
(military)
– Reduced system switching noise
– Typical V
OLP
(Output Ground Bounce) < 0.6V at
V
CC
= 5V,T
A
= 25°C
• Features for FCT166244T/AT/CT:
– Light Drive Balanced Output:
±8mA
(commercial),
±6mA
(military)
– Minimal system switching noise
– Typical V
OLP
(Output Ground Bounce) < 0.25V at
V
CC
= 5V,T
A
= 25°C
• Features for FCT162H244T/AT/CT/ET:
– Bus-Hold retains last active bus state during 3-state
– Eliminates the need for external pull up resistors
DESCRIPTION:
The 16-Bit Buffer/Line Driver is for bus interface or signal buffering
applications requiring high speed and low power dissipation. These
devices have a flow through pin organization, and shrink packaging
to simplify board layout. All inputs are designed with hysteresis for
improved noise margin. The three-state controls allow independent
4-bit, 8-bit or combined 16-bit operation. These parts are plug in
replacements for 54/74ABT16244 where higher speed, lower noise
or lower power dissipation levels are desired.
The FCT16244T/AT/CT/ET are ideally suited for driving
high capacitance loads (>200pF) and low impedance
backplanes. These "high drive" buffers are designed with
power off disable capability to allow "live insertion" of boards
when used in a backplane interface.
The FCT162244T/AT/CT/ET have balanced output current
levels and current limiting resistors. These offer low ground
bounce, minimal undershoot, and controlled output fall times,
reducing the need for external series terminating resistors
while still providing very high speed operation for loads of less
than 200pF.
The FCT166244T/AT/CT are suited for very low noise,
point-to-point driving where there is a single receiver, or a very
light lumped load (<100pF). The buffers are designed to limit
the output current to levels which will avoid noise and ringing
on the signal lines without using external series terminating
resistors.
The FCT162H244T/AT/CT/ET have "Bus-Hold" which re-
tains the input's last state whenever the input goes to high
impedance. This prevents "floating" inputs and eliminates the
need for pull-up/down resistors.
FUNCTIONAL BLOCK DIAGRAM
1
OE
1
A
1
1
A
2
1
A
3
1
A
4
1
Y
1
1
Y
2
1
Y
3
1
Y
4
3
OE
3
A
1
3
A
2
3
Y
1
3
Y
2
3
A
3
3
A
4
4
OE
3
Y
3
3
Y
4
2
OE
2
A
1
2
A
2
2
A
3
2
A
4
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2
Y
1
2
Y
2
2
Y
3
2
Y
4
2544 drw 01
4
A
1
4
A
2
4
A
3
4
A
4
4
Y
1
4
Y
2
4
Y
3
4
Y
4
2544 drw 02
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996
Integrated Device Technology, Inc.
OCTOBER 1996
DSC-2544/9
5.2
15
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
