MPC940L
LOW VOLTAGE 1:18 CLOCK DISTRIBUTION CHIP
Table 7. DC Characteristics
(T
A
= 0° to 70°C, V
CCI
= 2.5 V ±5%; V
CCO
= 2.5 V ±5%)
Symbol
V
IH
V
IL
V
PP
V
CMR
V
OH
V
OL
I
IN
C
IN
C
pd
Z
OUT
I
CC
Characteristic
Input HIGH Voltage
Input LOW Voltage
Peak-to-Peak Input Voltage
Common Mode Range
Output HIGH Voltage
Output LOW Voltage
Input Current
Input Capacitance
Power Dissipation Capacitance
Output Impedance
Maximum Quiescent Supply Current
18
4.0
10
23
0.5
28
1.0
CMOS_CLK
CMOS_CLK
PECL_CLK
PECL_CLK
500
V
CCI
– 1.0
1.8
0.5
±200
Min
2.0
Typ
Max
V
CCI
0.8
1000
V
CCI
– 0.6
Unit
V
V
mV
V
V
V
µA
pF
pF
Ω
mA
per output
I
OH
= –12 mA
I
OL
= 12 mA
Condition
Table 8. AC Characteristics
(T
A
= 0° to 70°C, V
CCI
= 2.5 V ±5%; V
CCO
= 2.5 V ±5%)
Symbol
F
max
t
PLH
t
PLH
t
sk(o)
t
sk(pp)
t
sk(pp)
t
sk(pp)
DC
t
r
, t
f
Characteristic
Maximum Input Frequency
Propagation Delay
Propagation Delay
PECL_CLK
≤
150 MHz
CMOS_CLK
≤
150 MHz
PECL_CLK > 150 MHz
CMOS_CLK > 150 MHz
PECL_CLK
CMOS_CLK
2.6
2.3
2.8
2.3
4.0
3.1
3.8
3.1
Min
Typ
Max
200
5.2
4.0
5.0
4.0
200
200
2.6
1.7
2.2
1.7
1.2
1.0
45
40
0.3
50
50
55
60
1.2
Unit
MHz
ns
ns
ps
ns
ns
ns
%
%
ns
Note
(1)
Note
(1)
Note
(2)
Input DC = 50%
Input DC = 50%
0.5 - 1.8 V
Condition
Output-to-Output Skew
Part-to-Part Skew
Part-to-Part Skew
Part-to-Part Skew
Output Duty Cycle
Output Rise/Fall Time
PECL_CLK
≤
150 MHz
CMOS_CLK
≤
150 MHz
PECL_CLK > 150 MHz
CMOS_CLK > 150 MHz
PECL_CLK
CMOS_CLK
f
CLK
< 134 MHz
f
CLK
≤
200 MHz
1. Across temperature and voltage ranges. Includes output skew.
2. For specific temperature and voltage. Includes output skew.
IDT™ / ICS™
1:18 CLOCK DISTRIBUTION CHIP
5
MPC940L REV 7 JUNE 5, 2007
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
