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IN74ACT192D 参数 Datasheet PDF下载

IN74ACT192D图片预览
型号: IN74ACT192D
PDF下载: 下载PDF文件 查看货源
内容描述: 可预置BCD /十年增/减计数器高速硅栅CMOS [Presettable BCD/Decade UP/DOWN Counter High-Speed Silicon-Gate CMOS]
分类和应用: 计数器
文件页数/大小: 8 页 / 592 K
品牌: IKSEMICON [ IK SEMICON CO., LTD ]
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TECHNICAL DATA
IN74ACT192
Presettable BCD/Decade UP/DOWN Counter
High-Speed Silicon-Gate CMOS
The IN74ACT192 is identical in pinout to the LS/ALS192,
HC/HCT192. The IN74ACT192 may be used as a level converter for
interfacing TTL or NMOS outputs to High Speed CMOS inputs.
The counter has two separate clock inputs, a Count Up Clock and
Count Down Clock inputs. The direction of counting is determined by
which input is clocked. The outputs change state synchronous with the
LOW-to-HIGH transitions on the clock inputs. This counter may be
preset by entering the desired data on the P0, P1, P2, P3 input. When
the Parallel Load input is taken low the data is loaded independently
of either clock input. This feature allows the counters to be used as
devide-by-n by modifying the count lenght with the preset inputs. In
addition the counter can also be cleared. This is accomplished by
inputting a high on the Master Reset input. All 4 internal stages are set
to low independently of either clock input.Both a Terminal Count
Down (TC
D
) and Terminal Count Up (TC
U
) Outputs are provided to
enable cascading of both up and down counting functions. The TC
D
output produces a negative going pulse when the counter underflows
and TC
U
outputs a pulse when the counter overflows. The counter can
be cascaded by connecting the TC
U
and TC
D
outputs of one device to
the Count Up Clock and Count Down Clock inputs, respectively, of
the next device.
TTL/NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0
µA;
0.1
µA
@ 25°C
Outputs Source/Sink 24 mA
ORDERING INFORMATION
IN74ACT192N Plastic
IN74ACT192D SOIC
T
A
= -40° to 85° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16 =V
CC
PIN 8 = GND
Rev. 00