TECHNICAL DATA
IN74HC75A
Dual 2-Bit Transparent Latch
High-Performance Silicon-Gate CMOS
The IN74HC75A is identical in pinout to the LS/ALS75. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LS/ALSTTL outputs.
This device consists of two independent 2-bit transparent latches and
can be used as temporary storage for binary information between
processing units and input/output or indicator units. Each latch stores the
input data while Latch Enable is at a logic low. The outputs follow the
data inputs when Latch Enable is at a logic high.
•
Outputs Directly Interface to CMOS, NMOS, and TTL
•
Operating Voltage Range: 2.0 to 6.0 V
•
Low Input Current: 1.0
µA
•
High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
IN74HC75AN Plastic
IN74HC75AD SOIC
T
A
= -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 5=V
CC
PIN 12 = GND
FUNCTION TABLE
Inputs
D
L
H
X
Latch
Enable
H
H
L
Outputs
Q
L
H
Q0
Q
H
L
Q0
X = Don’t Care
Q0 = latched data
Rev. 00
IKSEMICON [ IK SEMICON CO., LTD ]
