TECHNICAL DATA
IW4020B
14 Stage Ripple-Carry Binary
Counter/Divider
High-Voltage Silicon-Gate CMOS
The IW4020B is ripple-carry binary counter. All counter stages are master-
slave flip-flops. The state of a counter advances one count on the negative
transition of each input pulse; a high level on the RESET line resets the counter
to its all zeros state. Schmitt trigger action on the input-pulse line permits
unlimited rise and fall times.
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1
μA
at 18 V over full package-temperature
range; 100 nA at 18 V and 25°C
•
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
16
1
16
1
N SUFFIX
PLASTIC DIP
ORDERING INFORMATION
IW4020BN
Plastic DIP
IW4020BD
SOIC
T
A
= -55° to 125° C for all packages
LOGIC DIAGRAM
9
7
5
CLOCK
10
4
6
13
12
14
15
1
2
3
11
RESET
Q1
Q4
Q5
Q6
Q7
Q8
Q9
Q10
Q11
Q12
Q13
Q14
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
Clock
Reset
L
L
X
H= high level
L = low level
X=don’t care
H
Output
Output state
No change
Advance to next
state
All Outputs are low
PIN 16 =V
CC
PIN 8 = GND
Rev. 00
IKSEMICON [ IK SEMICON CO., LTD ]
