TECHNICAL DATA
IW4093B
Quad 2-Input NAND Schmitt Triggers
High-Voltage Silicon-Gate CMOS
The IW4093B consists of four Schmitt-trigger circuits. Each circuit
functions as a two-input NAND gate with Schmitt-trigger action on both
inputs. The gate switches at different points for positive- and negative-
going signals. The difference between the positive voltage (V
Т+
) and the
negative voltage (V
Т-
) is defined as hysteresis voltage (V
H
) (see Fig.1).
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1
μA
at 18 V over full package-temperature
range; 100 nA at 18 V and 25°C
•
Noise margin (over full package temperature range):
0.5 V min @ 5.0 V supply
1.0 V min @ 10.0 V supply
1.5 V min @ 15.0 V supply
ORDERING INFORMATION
IW4093BN Plastic
IW4093BD SOIC
T
A
= -55° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
A
PIN 14 =V
CC
PIN 7 = GND
L
L
H
H
B
L
H
L
H
Output
Y
H
H
H
L
L – LOW voltage level
H – HIGH voltage level
Rev. 00