TECHNICAL DATA
IW4502B
Strobed Hex Inverter/Buffer
High-Voltage Silicon-Gate CMOS
The IW4502B consists of six inverter/buffers with 3-state outputs. A
logic “1” on the OUTPUT ENABLE input produces a high impedance
state in all six outputs. This feature permits common busing of the
outputs, thus simplifying system design. A logic “1” on the DIRECTION
input switches all six outputs to logic “0” if the OUTPUT ENABLE input
is a logic “0”.
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1
μA
at 18 V over full package-temperature
range; 100 nA at 18 V and 25°C
•
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
IW4502BN Plastic
IW4502BD SOIC
T
A
= -55° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
Output
Enable
L
L
L
H
PIN 16=V
CC
PIN 8= GND
Direction
L
L
H
X
A
L
H
X
X
Output
Y
H
L
L
Z
Z = high impedance
X = don’t care
Rev. 00
IKSEMICON [ IK SEMICON CO., LTD ]
