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BTS726L1 参数 Datasheet PDF下载

BTS726L1图片预览
型号: BTS726L1
PDF下载: 下载PDF文件 查看货源
内容描述: 双通道海赛德智能电源开关(过载保护电流限制,短路保护热关断) [Smart Two Channel Highside Power Switch (Overload protection Current limitation Short-circuit protection Thermal shutdown)]
分类和应用: 开关电源开关过载保护
文件页数/大小: 15 页 / 186 K
品牌: INFINEON [ INFINEON TECHNOLOGIES AG ]
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PROFET® BTS 726 L1
Smart Two Channel Highside Power Switch
Features
Overload protection
Current limitation
Short-circuit protection
Thermal shutdown
Overvoltage protection
(including load dump)
Fast demagnetization of inductive loads
Reverse battery protection
1)
Undervoltage and overvoltage shutdown
with auto-restart and hysteresis
Open drain diagnostic output
Open load detection in ON-state
CMOS compatible input
Loss of ground and loss of V
bb
protection
Electrostatic discharge
(ESD) protection
Product Summary
Overvoltage Protection
Operating voltage
active channels:
On-state resistance
R
ON
Nominal load current
I
L(NOM)
Current limitation
I
L(SCr)
V
bb(AZ)
V
bb(on)
one
60
4.0
16
43
V
5.0 ... 34
V
two parallel
30
mΩ
6.0
A
16
A
Application
• µC
compatible power switch with diagnostic feedback
for 12 V and 24 V DC grounded loads
All types of resistive, inductive and capacitive loads
Replaces electromechanical relays and discrete circuits
General Description
N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic
feedback, monolithically integrated in Smart SIPMOS
®
technology. Fully protected by embedded protection
functions.
Pin Definitions and Functions
Pin
1,10,
11,12,
15,16,
19,20
3
7
17,18
13,14
4
8
2
6
5,9
Symbol Function
Positive power supply voltage.
Design the
V
bb
wiring for the simultaneous max. short circuit
currents from channel 1 to 2 and also for low
thermal resistance
IN1
Input 1,2,
activates channel 1,2 in case of
IN2
logic high signal
OUT1
Output 1,2,
protected high-side power output
OUT2
of channel 1,2. Design the wiring for the max.
short circuit current
ST1
Diagnostic feedback 1,2
of channel 1,2,
ST2
open drain, low on failure
GND1
Ground 1
of chip 1 (channel 1)
GND2
Ground 2
of chip 2 (channel 2)
N.C.
Not Connected
Pin configuration
(top view)
V
bb
GND1
IN1
ST1
N.C.
GND2
IN2
ST2
N.C.
V
bb
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
bb
V
bb
OUT1
OUT1
V
bb
V
bb
OUT2
OUT2
V
bb
V
bb
1
)
With external current limit (e.g. resistor R
GND
=150
Ω)
in GND connection, resistor in series with ST
connection, reverse load current limited by connected load.
Semiconductor Group
1
06.96