Low Level Controller
/*
/*
/*
Parms
: pointer to PEITAB table element of ICC / ISAC-S
*/
*/
*/
purpose : handle C/I interrupts
/***************************************************************************/
EXPORT void
IntL1_SBC (pt)
register PEITAB
*pt;
{
pt->pt_CI_rec = inp (pt->pt_r_cixr);/* read CIRR (CIR0) register
*/
*/
if (pt->pt_ModulMode == PT_MM_NT)
{
/* in NT / LT-S configuration:
/* send DID if SBC/ISAC-S is in the */
/* DIU state
/* -> deactivation
*/
*/
if ((pt->pt_CI_rec & CIR_MASK) == CI_DIU)
{
if (pt->pt_state & PT_IOM2)
outp (pt->pt_r_cixr, CIXR_TBC | CI_DID | 0x03);
else
outp (pt->pt_r_cixr, CIXR_TBC | CI_DID);
}
}
else
{
/* TE configuration:
/* power down SBC/ISAC-S if it has */
*/
/* changed from activated to
/* pending mode
*/
*/
if ((pt->pt_CI_rec & CIR_MASK) == CI_DR)
{
if (pt->pt_state & PT_IOM2)
outp (pt->pt_r_cixr, CIXR_TBC | CI_DIU | 0x03);
else
outp (pt->pt_r_cixr, CIXR_TBC | CI_DIU);
}
/* activation confirmation in IOM2 */
/* configurations. The SBC
/* (ISAC-S) must confirm an
/* activation from network side.
*/
*/
*/
/* Only then it will be transparent */
/* for upstream B channel data */
if ((pt->pt_state & PT_IOM2) &&
((pt->pt_CI_rec & CIR_MASK) == CI_AI))
outp (pt->pt_r_cixr, CIXR_TBC | CI_AR | 0x03);
}
DECODE_L1_STATUS (pt->pt_pei, pt->pt_CI_rec);
}
/***************************************************************************/
/*
/*
/*
/*
/*
*/
*/
*/
*/
*/
Function: ResL1_SBC ()
Parms
: pointer to PEITAB table element of ICC / ISAC-S
purpose : Reset SBC / L1 part of ISAC-S
(also used for device test)
Semiconductor Group
314
INFINEON [ Infineon ]
