IA186EM/IA188EM
8-Bit/16-Bit Microcontrollers
Data Sheet
February 25, 2011
0ns
A
clkouta
20ns
40ns
60ns
80ns
100ns
120ns
140ns
160ns
180ns
68
a19–a0
a
0
-
9
1
ad15–ad0 (IA186EM),
ad8–ad0 (IA188EM),
ao15–ao8 (IA188EM)
ale
a
e
l
Invalid Address
5
Invalid Address
9
11
10
den_n
n
19
dt/r_n
22
n
s1_n–s0_n
_
3
Status
4
Figure 19. Software Halt Cycle
Table 89. Software Halt Cycle Timing
No.
Name
Description
General Timing Responses
3
tCHSV
Status Active Delay
4
tCLSH
Status Inactive Delay
ad
Address Valid Delay
5
tCLAV
9
tCHLH
ale Active Delay
10
tLHLL
ale Width
11
tCHLL
ale Inactive Delay
19
tDXDL
den_n Inactive to dt/r_n Low
22
tCHCTV Control Active Delay 2
clkouta High to
a
Address Valid
68
tCHAV
a
In
Min
a
0
0
0
0
tCLCH-5
0
0
0
0
Max
a
6
6
12
8
–
8
–
10
8
nanoseconds.
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