IA186EM/IA188EM
Data Sheet
8-Bit/16-Bit Microcontrollers
February 25, 2011
5.1.6 CDRAM (0e2h) ..............................................................................................61
5.1.7 MDRAM (0e0h) .............................................................................................62
5.1.8 D1CON (0dah) and D0CON (0cah) ...............................................................62
5.1.9 D1TC (0d8h) and D0TC (0c8h) .....................................................................64
5.1.10 D1DSTH (0d6h) and D0DSTH (0c6h)...........................................................64
5.1.11 DIDSTL (0d4h) and D0DSTL (0c4h) ............................................................65
5.1.12 D1SRCH (0d2h) and D0SRCH (0c2h)...........................................................65
5.1.13 D1SRCL (0d0h) and D0SRCL (0c0h)............................................................66
5.1.14 MPCS (0a8h) ..................................................................................................66
5.1.15 MMCS (0a6h).................................................................................................67
5.1.16 PACS (0a4h)...................................................................................................68
5.1.17 LMCS (0a2h)..................................................................................................70
5.1.18 UMCS (0a0h)..................................................................................................71
5.1.19 SPBAUD (088h).............................................................................................72
5.1.20 SPRD (086h)...................................................................................................73
5.1.21 SPTD (084h)...................................................................................................74
5.1.22 SPSTS (082h) .................................................................................................74
5.1.23 SPCT (080h)...................................................................................................75
5.1.24 PDATA1 (07ah) and PDATA0 (074h)...........................................................77
5.1.25 PDIR1 (078h) and PDIR0 (072h)...................................................................79
5.1.26 PIOMODE1 (076h) and PIOMODE0 (070h).................................................79
5.1.27 T1CON (05eh) and T0CON (056h)................................................................80
5.1.28 T2CON (066h)................................................................................................81
5.1.29 T2COMPA (062h), T1COMPB (05ch), T1COMPA (05ah),
T0COMPB (054h), and T0COMPA (052h) ...................................................82
5.1.30 T2CNT (060h), T1CNT (058h), and T0CNT (050h) .....................................83
5.1.31 SPICON (044h) (Master Mode) .....................................................................83
5.1.32 WDCON (044h) (Master Mode) ....................................................................84
5.1.33 I4CON (040h) (Master Mode)........................................................................84
5.1.34 I3CON (03eh) and I2CON (03ch) (Master Mode).........................................85
5.1.35 I1CON (03ah) and I0CON (038h) (Master Mode).........................................85
5.1.36 TCUCON (032h) (Master Mode) ...................................................................86
5.1.37 T2INTCON (03ah), T1INTCON (038h), and T0INTCON (032h)
(Slave Mode) ..................................................................................................87
5.1.38 DMA1CON/INT6CON (036h) and DMA0CON/INT5CON (034h)
(Master Mode) ................................................................................................87
5.1.39 DMA1CON/INT6 (036h) and DMA0CON/INT5 (034h) (Slave
Mode)..............................................................................................................87
5.1.40 INTSTS (030h) (Master Mode)......................................................................88
5.1.41 INTSTS (030h) (Slave Mode) ........................................................................88
5.1.42 REQST (02eh) (Master Mode).......................................................................89
5.1.43 REQST (02eh) (Slave Mode) .........................................................................90
5.1.44 INSERV (02ch) (Master Mode) .....................................................................90
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