IA186ES/IA188ES
Data Sheet
8-Bit/16-Bit Microcontrollers
November 15, 2011
Table 78. Numeric Key to Waveform Parameters (Continued)
a
a
No.
Name
Description
Min
9
Max
–
52 tARYLCL ardy Setup Time
53 tINVCH Peripheral Setup Time
54 tINVCL drq Setup Time
10
10
0
–
–
55 tCLTMV Timer Output Delay
57 tRESIN res_n Setup Time
12
–
10
10
0
58 tHVCL
59 tRHDX rd_n High to Data Hold on ad Bus
61 tLOCK Maximum PLL Lock Time
hld Setup Time
–
–
–
0.5
7
62 tCLHAV hlda Valid Delay
0
63 tCHCZ Command Lines Float Delay
64 tCHCV Command Lines Valid Delay (after Float)
65 tAVWL a Address Valid to wr_n Low
0
12
12
–
0
tCLCL+tCHCL
66 tAVRL
a Address Valid to rd_n Low
tCLCL+tCHCL
–
67 tCHCSV clkouta High to lcs_n/usc_n Valid
68 tCHAV clkouta High to a Address Valid
69 tCICOA x1 to clkouta Skew
0
9
0
8
–
25
35
12
9
70 tCICOB x1 to clkoutb Skew
–
79 tCHRFD clkouta High to rfsh_n Valid
80 tCLCLX lcs_n Inactive Delay
0
0
81 tCLCSL lcs_n Active Delay
0
9
82 tCLRF
83 tCOAOB clkouta to clkoutb Skew
84 tLRLL lcs_n Precharge Pulse Width
85 tRFCY rfsh_n Cycle Time
clkouta High to rfsh_n Invalid
0
12
11
–
3
tCLCL+tCLCH
6tCLCL
2tCLCL
tCHCL-1.5
0
–
86 tLCRF
87 tAVBL
lcs_n Inactive to rfsh_n Active Delay
a Address Valid to whb_n/wlb_n Low
–
tCHCL
tCLCL
tCLCH
98 tDSHDIW ds_n High to Data Invalid (Write)
99 tPLAL pcs Low to ale Low
–
a
In nanoseconds.
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