IA63484
Advanced CRT Controller
FUNCTIONAL REQUIREMENTS:
Drawing Processor:
Data Sheet
The Drawing Processor performs drawing operations on the frame buffer memory upon interpreting
commands and command parameters issued by the host bus (MPU or DMAC). The drawing
processor then executes ACRTC drawing algorithms and converts logical X-Y addresses to physical
frame buffer addresses.
The drawing processor uses three operation control units; the Drawing Algorithm Control unit, the
Drawing Address Generation unit and the Logical Operation unit.
The Drawing Algorithm Control Unit interprets graphic commands and parameters and executes the
appropriate micro-programmed drawing algorithm. This control unit calculates coordinates using
logical pixel X-Y addressing.
The Drawing Address Generation Unit converts logical X-Y addresses from the Drawing Algorithm
Control unit to a bit address in the frame buffer. The frame buffer is organized as sequential 16 bit
words. The bit address consists of 20 bits and bits 0-4 specifying the logical pixel bit address within
the physical frame buffer word.
Logical Operation Unit, using the address calculated in the drawing algorithm control and drawing
address generation units, performs logical operations between the existing read data in the frame
buffer and the drawing pattern in the pattern RAM, and rewrites the results into the frame buffer. A
detailed description of the Drawing Processor is contained in its module specification.
Display Processor:
The display processor manages frame buffer refresh addressing based on the user specified display
screen organization. It combines and displays as many as 4 independent screen segments (3
horizontal split screens and 1 window) using an internal high-speed address calculation unit. It
controls display refresh outputs in graphic (physical frame buffer address) or character (physical
refresh memory address and row address) modes.
Display Functions:
The ACRTC allows the frame buffer to be divided into four separate logical screens:
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Upper
Base
Lower
Window
In the simplest case, only the base screen parameters must be defined. Other screens may be
selectively enabled, disabled, and blanked under software control.
The background screens (upper, base, and lower) split the screen into three horizontal partitions
whose positions are fully programmable. The window screen is unique, since the ACRTC usually
gives it higher priority than the background screens. A typical application might be to use the base
screen for the bulk of the user interaction, while using the upper screen for pull-down menus and the
lower screen for status line indicators. The exception is in the ACRTC superimpose mode, in which
the window has the same priority as the background screens. In this mode, the window and
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2001
innovASIC
The End of Obsolescence™
ENG 21101041200
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