IN74ACT112
D
UAL
J-K F
LIP
-F
LOP
WITH
S
ET AND
R
ESET
High-Speed Silicon-Gate CMOS
The IN74ACT112 is identical in pinout to the LS/ALS112,
HC/HCT112. The IN74ACT112 may be used as a level converter
for interfacing TTL or NMOS outputs to High Speed CMOS
inputs.
Each flip-flop is negative-edge clocked and has active-low
asynchronous Set and Reset inputs.
•
TTL/NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0
µA;
0.1
µA
@ 25°C
Outputs Source/Sink 24 mA
•
•
•
•
ORDERING INFORMATION
IN74ACT112N Plastic
IN74ACT112D SOIC
T
A
= -40° to 85° C for all
packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Set
L
H
L
H
H
H
H
H
H
H
Inputs
Reset
Clock
H
L
L
H
H
H
H
H
H
H
X
X
X
J
X
X
X
L
L
H
H
X
X
X
K
X
X
X
L
H
L
H
X
X
X
Outputs
Q
Q
H
L
L
H
*
L
L
*
No Change
L
H
H
L
Toggle
No Change
No Change
No Change
PIN 16=V
CC
PIN 8 = GND
L
H
* Both outputs will remain low as long as Set and
Reset are low, but the output states are
unpredictable if Set and Reset go high
simultaneously
X = Don’t Care
1
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