IN74ACT651
O
CTAL
3-S
TATE
B
US
T
RANSCEIVERS
AND
D F
LIP
-F
LOPS
High-Speed Silicon-Gate CMOS
The IN74ACT651 is identical in pinout to the LS/ALS651,
HC/HCT651. The IN74ACT651 may be used as a level converter
for interfacing TTL or NMOS outputs to High Speed CMOS
inputs.
These devices consists of bus transceiver circuits, D-type flip-
flop, and control circuitry arranged for multiplex transmission of
data directly from the data bus or from the internal storage
registers. Direction and Output Enable are provided to select the
read-time or stored data function. Data on the A or B Data bus,
or both, can be stored in the internal D flip-flops by low-to-high
transitions at the appropriate clock pins (A-to-B Clock or B-to-A
Clock) regardless of the select or enable or enable control pins.
When A-to-B Source and B-to-A Source are in the real-time
transfer mode, it is also possible to store data without using the
internal D-type flip-flops by simultaneously enabling Direction
and Output Enable. In this configuration each output reinforces
its input. Thus, when all other data sources to the two sets of bus
lines are at high impedance, each set of bus lines will remain
at its last state.
The IN74ACT651 has inverted outputs.
•
TTL/NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0
µA;
0.1
µA
@ 25°C
Outputs Source/Sink 24 mA
LOGIC DIAGRAM
ORDERING INFORMATION
IN74ACT651N Plastic
IN74ACT651DW SOIC
T
A
= -40° to 85° C for all
packages
PIN ASSIGNMENT
•
•
•
•
PIN 24=V
CC
PIN 12 = GND
1
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