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    82551IT 参数 Datasheet PDF下载

    82551IT图片预览
    型号： 82551IT
    PDF下载： 下载PDF文件 查看货源
    内容描述： 快速以太网PCI控制器 [Fast Ethernet PCI Controller]
    分类和应用： 控制器PC以太网
    文件页数/大小： 102 页 / 732 K
    品牌： INTEL [ INTEL CORPORATION ]
     浏览型号82551IT的Datasheet PDF文件第1页浏览型号82551IT的Datasheet PDF文件第2页浏览型号82551IT的Datasheet PDF文件第3页浏览型号82551IT的Datasheet PDF文件第4页浏览型号82551IT的Datasheet PDF文件第6页浏览型号82551IT的Datasheet PDF文件第7页浏览型号82551IT的Datasheet PDF文件第8页浏览型号82551IT的Datasheet PDF文件第9页  
    Networking Silicon — 82551IT
    8.2
    9.0
    9.1
    8.1.8 Receive Direct Memory Access Byte Count........................................... 56
    8.1.9 Flow Control Register............................................................................. 56
    Statistical Counters ............................................................................................. 57
    MDI Registers 0 - 7 ............................................................................................. 61
    9.1.1 Register 0: Control Register .................................................................. 61
    9.1.2 Register 1: Status Register ................................................................... 62
    9.1.3 Register 2: PHY Identifier Register ....................................................... 63
    9.1.4 Register 3: PHY Identifier Register ....................................................... 63
    9.1.5 Register 4: Auto-Negotiation Advertisement Register ........................... 63
    9.1.6 Register 5: Auto-Negotiation Link Partner Ability Register .................... 64
    9.1.7 Register 6: Auto-Negotiation Expansion Register ................................. 64
    MDI Registers 8:15..............................................................................................64
    MDI Register 16:31 ............................................................................................. 65
    9.3.1 Register 16: PHY Unit Status and Control Register .............................. 65
    9.3.2 Register 17: PHY Unit Special Control Register ................................... 65
    9.3.3 Register 18: PHY Address Register ....................................................... 66
    9.3.4 Register 19: 100BASE-TX Receive False Carrier Counter ................... 66
    9.3.5 Register 20: 100BASE-TX Receive Disconnect Counter ...................... 67
    9.3.6 Register 21: 100BASE-TX Receive Error Frame Counter .................... 67
    9.3.7 Register 22: Receive Symbol Error Counter ......................................... 67
    9.3.8 Register 23: 100BASE-TX Receive Premature End of Frame Error Coun-
    ter .......................................................................................................... 67
    9.3.9 Register 24: 10BASE-T Receive End of Frame Error Counter ............. 67
    9.3.10 Register 25: 10BASE-T Transmit Jabber Detect Counter ..................... 68
    9.3.11 Register 26: Equalizer Control and Status Register .............................. 68
    9.3.12 Register 27: PHY Unit Special Control Register ................................... 68
    9.3.13 Register 28: MDI/MDI-X Control Register .............................................. 69
    9.3.14 Register 29: Hardware Integrity Control Register .................................. 69
    Introduction.......................................................................................................... 71
    Test Function Description.................................................................................... 71
    10.2.1 Tristate ................................................................................................... 71
    10.2.2 XOR Tree ............................................................................................... 72
    Absolute Maximum Ratings................................................................................. 75
    DC Specifications ............................................................................................... 76
    AC Specifications ................................................................................................ 80
    Timing Specifications .......................................................................................... 81
    11.4.1 Clocks Specifications ............................................................................. 81
    11.4.2 Timing Parameters ................................................................................. 82
    PHY Unit Registers ..........................................................................................................61
    9.2
    9.3
    10.0
    82551IT Test Port Functionality ....................................................................................... 71
    10.1
    10.2
    11.0
    Electrical and Timing Specifications................................................................................. 75
    11.1
    11.2
    11.3
    11.4
    Datasheet
    v

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