28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
5.0
Reset Operations
Figure 9. AC Waveform: Deep Power-Down/Reset Operation
RP# (P)
V
IH
V
IL
t
PLPH
(A) Reset during Read Mode
t
PHQV
t
PHWL
t
PHEL
Abort
Complete
t
PLRH
RP# (P)
V
IH
V
IL
t
PHQV
t
PHWL
t
PHEL
t
PLPH
(B) Reset during Program or Block Erase,
t
PLPH
<
t
PLRH
Abort Deep
Complete Power-
Down
RP# (P)
V
IH
V
IL
t
PLRH
t
PHQV
t
PHWL
t
PHEL
t
PLPH
(C) Reset Program or Block Erase,
t
PLPH
>
t
PLRH
0580_09
Reset Specifications
V
CC
= 2.7 V–3.6 V
Symbol
Parameter
RP# Low to Reset during Read
(If RP# is tied to V
CC
, this specification is not applicable)
RP# Low to Reset during Block Erase or Program
Notes
Min
t
PLPH
t
PLRH
1,2
2,3
100
22
Max
ns
µs
Unit
NOTES:
1. If t
PLPH
is <100 ns the device may still RESET but this is not guaranteed
2. .Sampled, but not 100% tested.
3. If RP# is asserted while a block erase or word program operation is not executing, the reset will complete
within 100 ns.
3UHOLPLQDU\
33
INTEL [ INTEL CORPORATION ]
