£
Intel Advanced+ Boot Block Flash Memory (C3)
Figure 1. 48-Lead TSOP Package
A15
A14
A13
A12
A11
A10
A9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
VCCQ
GND
DQ15
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VCC
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE#
GND
CE#
A0
A8
64 M
32 M
A21
A20
WE#
RP#
VPP
WP#
A19
A18
A17
A7
A6
A5
A4
A3
Advanced+ Boot Block
48-Lead TSOP
12 mm x 20 mm
TOP VIEW
16 M
A2
A1
NOTES:
1. For lower densities, upper address should be treated as NC. For example, a 16-Mbit device will have NC on
Pins 9 and 10.
Datasheet
9
INTEL [ INTEL ]
