80C186EC 80C188EC and 80L186EC 80L188EC
16-BIT HIGH-INTEGRATION
EMBEDDED PROCESSOR
CONTENTS
INTRODUCTION
80C186EC CORE ARCHITECTURE
Bus Interface Unit
Clock Generator
80C186EC PERIPHERAL
ARCHITECTURE
Programmable Interrupt Controllers
Timer Counter Unit
Serial Communications Unit
DMA Unit
Chip-Select Unit
I O Port Unit
Refresh Control Unit
Watchdog Timer Unit
Power Management Unit
80C187 Interface (80C186EC only)
ONCE Test Mode
PACKAGE INFORMATION
Prefix Identification
Pin Descriptions
Pinout
Package Thermal Specifications
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings
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25
CONTENTS
Recommended Connections
DC SPECIFICATIONS
I
CC
versus Frequency and Voltage
PDTMR Pin Delay Calculation
AC SPECIFICATIONS
AC Characteristics 80C186EC25
AC Characteristics 80C186EC20 13
AC Characteristics 80L186EC13
AC Characteristics 80L186EC16
Relative Timings
Serial Port Mode 0 Timings
AC TEST CONDITIONS
AC TIMING WAVEFORMS
DERATING CURVES
RESET
BUS CYCLE WAVEFORMS
EXECUTION TIMINGS
INSTRUCTION SET SUMMARY
ERRATA
REVISION HISTORY
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2
INTEL [ INTEL CORPORATION ]
