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CA3140EZ 参数 Datasheet PDF下载

CA3140EZ图片预览
型号: CA3140EZ
PDF下载: 下载PDF文件 查看货源
内容描述: 4.5MHz ,采用BiMOS与MOSFET的输入运算放大器/双极性输出 [4.5MHz, BiMOS Operational Amplifier with MOSFET Input/Bipolar Output]
分类和应用: 运算放大器光电二极管PC
文件页数/大小: 23 页 / 1488 K
品牌: INTERSIL [ INTERSIL CORPORATION ]
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CA3140, CA3140A
Absolute Maximum Ratings
DC Supply Voltage (Between V+ and V- Terminals) . . . . . . . . . 36V
Differential Mode Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 8V
DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . (V+ +8V) To (V- -0.5V)
Input Terminal Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1mA
Output Short Circuit Duration∞ (Note 2) . . . . . . . . . . . . . . Indefinite
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
Thermal Information
Thermal Resistance (Typical, Note 1)
θ
JA
(
o
C/W)
θ
JC
(
o
C/W)
PDIP Package*. . . . . . . . . . . . . . . . . . .
115
N/A
SOIC Package . . . . . . . . . . . . . . . . . . .
165
N/A
Maximum Junction Temperature (Plastic Package) . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
*Pb-free PDIPs can be used for through hole wave solder process-
ing only. They are not intended for use in Reflow solder processing
applications.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1.
θ
JA
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details
2. Short circuit may be applied to ground or to either supply.
Electrical Specifications
V
SUPPLY
=
±15V,
T
A
= 25
o
C
TYPICAL VALUES
PARAMETER
Input Offset Voltage Adjustment Resistor
SYMBOL
TEST CONDITIONS
Typical Value of Resistor
Between Terminals 4 and 5 or 4 and 1 to
Adjust Max V
IO
CA3140
4.7
CA3140A
18
UNITS
kΩ
Input Resistance
Input Capacitance
Output Resistance
Equivalent Wideband Input Noise Voltage
(See Figure 27)
Equivalent Input Noise Voltage (See Figure 35)
R
I
C
I
R
O
e
N
e
N
BW = 140kHz, R
S
= 1MΩ
R
S
= 100Ω
f = 1kHz
f = 10kHz
1.5
4
60
48
40
12
40
18
4.5
9
220
1.5
4
60
48
40
12
40
18
4.5
9
220
0.08
10
4.5
1.4
TΩ
pF
µV
nV/√Hz
nV/√Hz
mA
mA
MHz
V/µs
µA
µs
%
µs
µs
Short Circuit Current to Opposite Supply
I
OM
+
I
OM
-
Source
Sink
Gain-Bandwidth Product, (See Figures 6, 30)
Slew Rate, (See Figure 31)
Sink Current From Terminal 8 To Terminal 4 to
Swing Output Low
Transient Response (See Figure 28)
f
T
SR
t
r
OS
R
L
= 2kΩ
C
L
= 100pF
R
L
= 2kΩ
C
L
= 100pF
Voltage Follower
Rise Time
Overshoot
To 1mV
To 10mV
0.08
10
4.5
1.4
Settling Time at 10V
P-P
, (See Figure 5)
t
S
Electrical Specifications
PARAMETER
Input Offset Voltage
Input Offset Current
Input Current
For Equipment Design, at V
SUPPLY
=
±15V,
T
A
= 25
o
C, Unless Otherwise Specified
CA3140
SYMBOL
|V
IO
|
|I
IO
|
I
I
MIN
-
-
-
TYP
5
0.5
10
MAX
15
30
50
MIN
-
-
-
CA3140A
TYP
2
0.5
10
MAX
5
20
40
UNITS
mV
pA
pA
3
FN957.10
July 11, 2005