DG506A, DG507A, DG508A, DG509A
Data Sheet
November 1999
File Number
3137.3
CMOS Analog Multiplexers
The DG506A, DG507A, DG508A and DG509A are CMOS
Monolithic 16-Channel/Dual 8-Channel and 8-Channel/Dual
4-Channel Analog Multiplexers, which can also be used as
demultiplexers. An enable input is provided. When the
enable input is high, a channel is selected by the address
inputs, and when low, all channels are off.
A channel in the ON state conducts current equally well in
both directions. In the OFF state each channel blocks
voltages up to the supply rails. The address inputs and the
enable input are TTL and CMOS compatible over the full
specified operating temperature range.
The DG506A, DG507A, DG508A and DG509A are pinout
compatible with the industry standard devices.
Features
• Low Power Consumption
• TTL and CMOS-Compatible Address and Enable Inputs
• 44V Maximum Power Supply Rating
• High Latch-Up Immunity
• Break-Before-Make Switching
• Alternate Source
Applications
• Data Acquisition Systems
• Communication Systems
• Signal Multiplexing/Demultiplexing
• Audio Signal Multiplexing
Ordering Information
PART NUMBER
DG506AAK
DG506ACJ
DG506ACY
DG507ABK
DG507ACJ
DG507ACY
TEMP.
RANGE (
o
C)
-55 to 125
0 to 70
0 to 70
-25 to 85
0 to 70
0 to 70
PACKAGE
28 Ld CERDIP
28 Ld PDIP
28 Ld SOIC
28 Ld CERDIP
28 Ld PDIP
28 Ld SOIC
PKG.
NO.
F28.6
E28.6
M28.3
F28.6
E28.6
M28.3
PART NUMBER
DG508AAK
DG508ABK
DG508ACJ
DG509ACJ
DG509ACY
TEMP.
RANGE (
o
C)
-55 to 125
-25 to 85
0 to 70
0 to 70
0 to 70
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld PDIP
16 Ld PDIP
16 Ld SOIC
PKG.
NO.
F16.3
F16.3
E16.3
E16.3
M16.3
Pinouts
DG506A (PDIP, CERDIP, SOIC)
TOP VIEW
V+ 1
NC 2
NC 3
S
16
4
S
15
5
S
14
6
S
13
7
S
12
8
S
11
9
S
10
10
S
9
11
GND 12
NC 13
A
3
14
28 D
27 V-
26 S
8
25 S
7
24 S
6
23 S
5
22 S
4
21 S
3
20 S
2
19 S
1
18 EN
17 A
0
16 A
1
15 A
2
DG507A (PDIP, CERDIP, SOIC)
TOP VIEW
V+ 1
D
B
2
NC 3
S
8B
4
S
7B
5
S
6B
6
S
5B
7
S
4B
8
S
3B
9
S
2B
10
S
1B
11
GND 12
NC 13
NC 14
28 D
A
27 V-
26 S
8A
25 S
7A
24 S
6A
23 S
5A
22 S
4A
21 S
3A
20 S
2A
19 S
1A
18 EN
17 A
0
16 A
1
15 A
2
DG508A (PDIP, CERDIP)
TOP VIEW
A
0
1
16 A
1
15 A
2
14 GND
13 V+
12 S
5
11 S
6
10 S
7
9 S
8
DG509A (PDIP, SOIC)
TOP VIEW
A
0
1
EN 2
V- 3
S
1A
4
S
2A
5
S
3A
6
S
4A
7
D
A
8
16 A
1
15 GND
14 V+
13 S
1B
12 S
2B
11 S
3B
10 S
4B
9 D
B
EN 2
V- 3
S
1
S
2
S
3
S
4
4
5
6
7
D 8
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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