HD-4702
Electrical Specifications
V
CC
= 5V
±10%,
T
A
= -40
o
C to +85
o
C (HD-4702-9), T
A
= -55
o
C to +125
o
C (HD-4702-8)
LIMITS
SYMBOL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
TLH
t
THL
t
s
t
h
t
s
t
h
t
wCP
(L)
t
wCP
(H)
t
wCP
(L)
t
wCP
(H)
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
TLH
t
THL
NOTES:
1. Propagation Delays (t
PLH
and t
PHL
) and Output Transition Times (t
TLH
and t
THL
) will change with Output Load Capacitance (C
L
). Setup Times
(t
s
), Hold Times (t
h
), and Minimum Pulse Widths (t
w
) do not vary with load capacitance.
2. For multichannel operation, Propagation Delay (CO to Qn) plus Set-Up Time, Select to CO, is guaranteed to be
≤
367ns.
3. The first High Level Clock Pulse after E
CP
goes Low must be at least 350ns long to guarantee reset of all Counters.
4. It is recommended that input rise and fall times to the clock inputs (CP, I
X
) be less than 15ns.
Output Transition Time (Except O
X
)
Propagation Delay CO to Z
Propagation Delay CO to Qn
Propagation Delay CP to CO
Set-Up Time, Select to CO
Hold Time, Select to CO
Set-Up Time, I
M
to CO
Hold Time, I
M
to CO
Minimum Clock Pulse Width, Low (Notes 3, 4)
Minimum Clock Pulse Width, High (Notes 3, 4)
Minimum I
X
Pulse Width, Low (Note 4)
Minimum I
X
Pulse Width, High (Note 4)
Propagation Delay I
X
to CO
Output Transition Time (Except O
X
)
Propagation Delay, CO to Z
Propagation Delay, CO to Qn
Propagation Delay, CP to CO
AC PARAMETER
Propagation Delay, I
X
to CO
MIN
-
-
-
-
-
-
-
-
-
-
350
0
350
0
120
120
160
160
-
-
-
-
-
-
-
-
-
-
MAX
350
275
260
220
(Note 2)
(Note 2)
85
75
160
75
-
-
-
-
-
-
-
-
300
250
215
195
(Note 2)
(Note 2)
75
65
80
40
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
CC
= 4.5V
C
L
≤
7pF on O
X
C
L
= 15pF
(Note 1)
V
CC
= 4.5V
C
L
≤
7pF on O
X
C
L
= 50pF
(Note 1)
TEST
CONDITIONS
6
FN2954.2
August 24, 2006
INTERSIL [ INTERSIL CORPORATION ]
