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IS24C128-3GLI 参数 Datasheet PDF下载

IS24C128-3GLI图片预览
型号: IS24C128-3GLI
PDF下载: 下载PDF文件 查看货源
内容描述: 128K位的2线串行EEPROM CMOS [128K-bit 2-WIRE SERIAL CMOS EEPROM]
分类和应用: 存储内存集成电路光电二极管双倍数据速率可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 16 页 / 247 K
品牌: ISSI [ INTEGRATED SILICON SOLUTION, INC ]
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IS24C128
128K-bit 2-WIRE SERIAL
CMOS EEPROM
MAY 2007
FEATURES
• Organization:
– 16K-bit x 8-bit
• 64-Byte Page Write Buffer
• Two-Wire Serial Interface
– Bi-directional data transfer protocol
• Low Power CMOS Technology
– Active Current less than 2 mA (5V)
– Standby Current less than 5 µA (5V)
– Standby Current less than 2 µA (2.5V)
• Low Voltage Operation
– IS24C128-3: Vcc = 2.5V to 5.5V
• 400 KHz (I
2
C Protocol) Compatibility
• Hardware Data Protection
– Write Protect pin
• Sequential Read Feature
• Filtered Inputs for Noise Suppression
• Self time Write cycle with auto clear
– 5 ms @ 2.5V
• High Reliability
– Endurance: 100,000 Cycles
– Data Retention: 40 Years
• Industrial and Automotive temperature ranges
8-pin PDIP and 8-pin SOIC
DESCRIPTION
The IS24C128 is an electrically erasable PROM device
that uses the standard 2-wire interface for
communications. The IS24C128 contains a memory
array of 128K-bits (16,384 x 8), and is further
subdivided into 256 pages of 64 bytes each for page-
write mode. This EEPROM is offered in operating
voltages of 2.5V to 5.5V (IS24C128-3) to be compatible
with most application voltages. ISSI designed the
IS24C128 to be a low-cost and low-power 2-wire
EEPROM solution. The devices are packaged in 8-pin
PDIP and 8-pin SOIC.
The IS24C128 maintains compatibility with the popular
2-wire bus protocol, so it is easy to design into
applications implementing this bus type. The simple
bus consists of the Serial Clock wire (SCL) and the
Serial Data wire (SDA). Using the bus, a Master
device such as a microcontroller is usually connected
to one or more Slave devices such as the IS24C128.
The bit stream over the SDA line includes a series of
bytes, which identifies a particular Slave device, an
instruction, an address within that Slave device, and a
series of data, if appropriate. The IS24C128 has a
Write Protect pin (WP) to allow blocking of any write
instruction transmitted over the bus.
• Lead-free available
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com
Rev. C
05/08/07
1