IS42G32256
IS42G32256
256K x 32 x 2 (16-Mbit)
SYNCHRONOUS GRAPHICS RAM
ISSI
GRAPHIC FEATURES
• SMRS cycle
– Load mask register
– Load color register
• Write per bit (old mask)
• Block write (eight columns)
ISSI
®
®
ADVANCE INFORMATION
SEPTEMBER 1998
FEATURES
• 256,144 words x 32 bits x 2-bank organization
• All inputs are sampled at the positive going
edge of the system clock
• Dual internal bank control
• Single 3.3V
±
3V power supply
• Programmable mode register
– Burst length (1, 2, 4, 8, and full page)
– CAS latency (2 and 3)
– Burst type: Sequential and Interleave
• Burst Read single-bit Write Operation
• Refresh capability
– Auto, self-refresh
• 2,048 refresh cycles/32 ms
• LVTTL compatible inputs and outputs
• 100-pin PQFP
(14mm x 20mm)
DESCRIPTION
The ISSI IS42G32256 is a high-speed 16-Mbit CMOS
Synchronous Graphics RAM organized as 256K words x
32 bits x 2 banks. With SGRAM, all input and output
signals are synchronized with the rising edge of the
system clock. Programmable Mode Register and
Special Registers provide a choice of Read or Write burst
lengths of 1, 2, 4, or 8 locations or a Full Page with burst
termination options. The SGRAM performance is
enhanced with the Write-per-bit (WPB) and eight columns
of Block Write functions.
The IS42G32256 is ideal for high-performance, high-
bandwidth applications including workstation graphics,
set top box, games, and PC-2D/3D graphic applications.
Table 1. Key Timing Parameters
Symbol
t
CK
Parameter
Clock Cycle Time
Access Time @ CL = 3
Operating Frequency
-7
7
6
143
-8
8
6.5
125
-10
10
7
100
Units
ns
ns
MHz
This document contains ADVANCE INFORMATION data. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible
product. We assume no responsibility for any errors which may appear in this publication. © Copyright 1998, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc.
ADVANCE INFORMATION
SR037-0C
09/10/98
1
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
