IS42S32200B
TRUTH TABLE – COMMANDS AND DQM OPERATION
(1)
FUNCTION
COMMAND INHIBIT (NOP)
NO OPERATION (NOP)
ACTIVE (Select bank and activate row)
(3)
READ (Select bank/column, start READ burst)
BURST TERMINATE
PRECHARGE (Deactivate row in bank or banks)
AUTO REFRESH or SELF REFRESH
(Enter self refresh mode)
LOAD MODE REGISTER
(2)
(8)
(6,7)
(5)
(4)
(4)
ISSI
CS
H
L
L
L
L
L
L
L
L
—
—
RAS
X
H
L
H
H
H
L
L
L
—
—
CAS
X
H
H
L
L
H
H
L
L
—
—
WE
X
H
H
H
L
L
L
H
L
—
—
DQM
X
X
X
L/H
(8)
L/H
(8)
X
X
X
X
L
H
ADDR
X
X
Bank/Row
Bank/Col
Bank/Col
X
Code
X
Op-Code
—
—
DQs
X
X
X
X
Valid
®
WRITE (Select bank/column, start WRITE burst)
Active
X
X
X
Active
High-Z
Write Enable/Output Enable
Write Inhibit/Output High-Z
(8)
NOTES:
1. CKE is HIGH for all commands except SELF REFRESH.
2. A0-A10 define the op-code written to the mode register.
3. A0-A10 provide row address, and BA0, BA1 determine which bank is made active.
4. A0-A7 (x32) provide column address; A10 HIGH enables the auto precharge feature (nonpersistent), while A10 LOW disables
auto precharge; BA0, BA1 determine which bank is being read from or written to.
5. A10 LOW: BA0, BA1 determine the bank being precharged. A10 HIGH: All banks precharged and BA0, BA1 are “Don’t Care.”
6. AUTO REFRESH if CKE is HIGH, SELF REFRESH if CKE is LOW.
7. Internal refresh counter controls row addressing; all inputs and DQs are “Don’t Care” except for CKE.
8. Activates or deactivates the DQs during WRITEs (zero-clock delay) and READs (two-clock delay).
6
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. 00C
09/29/03
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
