IS42S32200B
512K Bits x 32 Bits x 4 Banks (64-MBIT)
SYNCHRONOUS DYNAMIC RAM
FEATURES
• Clock frequency: 166, 143 MHz
• Fully synchronous; all signals referenced to a
positive clock edge
• Internal bank for hiding row access/precharge
• Single 3.3V power supply
• LVTTL interface
• Programmable burst length:
(1, 2, 4, 8, full page)
• Programmable burst sequence:
Sequential/Interleave
• Self refresh modes
• 4096 refresh cycles every 64 ms
• Random column address every clock cycle
• Programmable
CAS
latency (2, 3 clocks)
• Burst read/write and burst read/single write
operations capability
• Burst termination by burst stop and precharge
command
• Industrial temperature availability
• Package 400-mil 86-pin TSOP II
• Lead free package is available
ISSI
®
PRELIMINARY INFORMATION
September 2003
OVERVIEW
ISSI
's 64Mb Synchronous DRAM IS42S32200B is
organized as 524,288 bits x 32-bit x 4-bank for improved
performance. The synchronous DRAMs achieve high-
speed data transfer using pipeline architecture. All inputs
and outputs signals refer to the rising edge of the clock
input.
PIN CONFIGURATION
(86-Pin TSOP (Type II)
V
DD
DQ0
V
DDQ
DQ1
DQ2
GNDQ
DQ3
DQ4
V
DDQ
DQ5
DQ6
GNDQ
DQ7
NC
V
DD
DQM0
WE
CAS
RAS
CS
NC
BA0
BA1
A10/AP
A0
A1
A2
DQM2
V
DD
NC
DQ16
GNDQ
DQ17
DQ18
V
DDQ
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
GND
DQ15
GNDQ
DQ14
DQ13
V
DDQ
DQ12
DQ11
GNDQ
DQ10
DQ9
V
DDQ
DQ8
NC
GND
DQM1
NC
NC
CLK
CKE
A9
A8
A7
A6
A5
A4
A3
DQM3
GND
NC
DQ31
V
DDQ
DQ30
DQ29
GNDQ
DQ28
DQ27
V
DDQ
DQ26
DQ25
GNDQ
DQ24
GND
PIN DESCRIPTIONS
A0-A10
BA0, BA1
DQ0 to DQ31
CLK
CKE
CS
RAS
CAS
WE
Address Input
Bank Select Address
Data I/O
System Clock Input
Clock Enable
Chip Select
Row Address Strobe Command
Column Address Strobe Command
Write Enable
DQ19
DQ20
GNDQ
DQ21
DQ22
V
DDQ
DQ23
V
DD
V
DD
GND
V
DDQ
GND
Q
NC
Power
Ground
Power Supply for DQ Pin
Ground for DQ Pin
No Connection
DQM0 to DQM3 Input/Output Mask
Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. 00C
09/29/03
1
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
