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IS42S16160D-7TL 参数 Datasheet PDF下载

IS42S16160D-7TL图片预览
型号: IS42S16160D-7TL
PDF下载: 下载PDF文件 查看货源
内容描述: 32Meg ×8 , 16兆X16 256兆位同步DRAM [32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM]
分类和应用: 动态存储器
文件页数/大小: 63 页 / 984 K
品牌: ISSI [ INTEGRATED SILICON SOLUTION, INC ]
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IS42S83200D, IS42S16160D
IS45S83200D, IS45S16160D
32Meg x 8, 16Meg x16
256-MBIT SYNCHRONOUS DRAM
FEATURES
• Clock frequency: 166, 143 MHz
• Fully synchronous; all signals referenced to a
positive clock edge
• Internal bank for hiding row access/precharge
• Single Power supply: 3.3V + 0.3V
• LVTTL interface
• Programmable burst length
– (1, 2, 4, 8, full page)
• Programmable burst sequence:
Sequential/Interleave
• Auto Refresh (CBR)
• Self Refresh
• 8K refresh cycles every 16 ms (A2 grade) or
64 ms (commercial, industrial, A1 grade)
• Random column address every clock cycle
• Programmable CAS latency (2, 3 clocks)
• Burst read/write and burst read/single write
operations capability
• Burst termination by burst stop and precharge
command
IS42S83200D
54-pin TSOPII
IS42S16160D
54-pin TSOPII
54-ball BGA (contact Marketing)
8M x 8 x 4 Banks 4M x16x4 Banks
JUNE 2009
OVERVIEW
ISSI
's 256Mb Synchronous DRAM achieves high-speed
data transfer using pipeline architecture. All inputs and
outputs signals refer to the rising edge of the clock input.
The 256Mb SDRAM is organized as follows.
KEY TIMING PARAMETERS
Parameter
Clk Cycle Time
CAS Latency = 3
CAS Latency = 2
Clk Frequency
CAS Latency = 3
CAS Latency = 2
Access Time from Clock
CAS Latency = 3
CAS Latency = 2
-6
6
10
166
100
5.4
6.5
-7
7
10
143
100
5.4
6.5
-75E
7.5
133
5.5
Unit
ns
ns
Mhz
Mhz
ns
ns
OPTIONS
• Package:
54-pin TSOP-II (x8 and x16)
54-ball BGA (x16 only)
• Operating Temperature Range:
Commercial (0
o
C to +70
o
C)
Industrial (-40
o
C to +85
o
C)
Automotive Grade A1 (-40
o
C to +85
o
C)
Automotive Grade A2 (-40
o
C to +105
o
C)
• Die Revision: D
ADDRESS TABLE
Parameter
Configuration
Refresh Count
32M x 8
8M x 8 x 4
banks
Com./Ind.
8K/64ms
A1
8K/64ms
A2
8K/16ms
A0-A12
A0-A9
BA0, BA1
A10/AP
16M x 16
4M x 16 x 4
banks
8K/64ms
8K/64ms
8K/16ms
A0-A12
A0-A8
BA0, BA1
A10/AP
Row Addresses
Column Addresses
Bank Address Pins
Auto Precharge Pins
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time with-
out notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain
the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com
Rev. B
06/11/09
1