IS61LV12816
128K x 16 HIGH-SPEED CMOS STATIC RAM
WITH 3.3V SUPPLY
FEATURES
High-speed access time: 8, 10, 12, and 15 ns
CMOS low power operation
TTL and CMOS compatible interface levels
Single 3.3V ± 10% power supply
Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
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ISSI
DESCRIPTION
®
NOVEMBER 2000
The
ISSI
IS61LV12816 is a high-speed, 2,097,152-bit static
RAM organized as 131,072 words by 16 bits. It is fabricated
using
ISSI
's high-performance CMOS technology. This highly
reliable process coupled with innovative circuit design
techniques, yields access times as fast as 8 ns with low power
consumption.
When
CE
is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be reduced
down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable and
Output Enable inputs,
CE
and
OE.
The active LOW Write
Enable (WE) controls both writing and reading of the memory.
A data byte allows Upper Byte (UB) and Lower Byte (LB)
access.
The IS61LV12816 is packaged in the JEDEC standard 44-pin
400-mil SOJ, 44-pin TSOP, 44-pin LQFP, and 48-pin mini
BGA (6mm x 8mm).
FUNCTIONAL BLOCK DIAGRAM
A0-A16
DECODER
128K x 16
MEMORY ARRAY
VCC
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CE
OE
WE
UB
LB
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.
CONTROL
CIRCUIT
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
11/30/00
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