IS62LV2568LL
256K x 8 LOW POWER and LOW Vcc
CMOS STATIC RAM
FEATURES
• Access times of 70 and 85 ns
•
CMOS low power operation:
— 120 mW (typical) operating
— 6 µW (typical) standby
• Low data retention voltage: 2V (min.)
• Output Enable (OE) and two Chip Enable
(CE1 and CE2) inputs for ease in applications
• TTL compatible inputs and outputs
• Fully static operation:
— No clock or refresh required
• Single 2.5V to 3.0V power supply
• Available in 32-pin TSOP (Type I), STSOP (Type I),
and 36-pin mini BGA
ISSI
DESCRIPTION
®
APRIL 2000
The
ISSI
IS62LV2568LL is a low voltage, 262,144 words
by 8 bits, CMOS SRAM. It is fabricated using
ISS
I’s low
voltage, six transistor (6T), CMOS technology. The device is
targeted to satisfy the demands of the state-of-the-art
technologies such as cell phones and pagers.
When
CE
is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be reduced
down with CMOS input levels. Additionally, easy memory
expansion is provided by using Chip Enable and Output
Enable inputs,
CE
and
OE.
The active LOW Write Enable (WE)
controls both writing and reading of the memory.
The IS62LV2568LL is available in 32-pin TSOP (Type I),
STSOP (Type I), and 36-pin mini BGA.
FUNCTIONAL BLOCK DIAGRAM
A0-A17
DECODER
256K x 8
MEMORY ARRAY
VCC
GND
I/O
DATA
CIRCUIT
I/O0-I/O7
COLUMN I/O
CE1
CE2
OE
WE
CONTROL
CIRCUIT
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. B
05/03/00
1
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
