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IS62WV5128BLL-55H 参数 Datasheet PDF下载

IS62WV5128BLL-55H图片预览
型号: IS62WV5128BLL-55H
PDF下载: 下载PDF文件 查看货源
内容描述: 512K ×8低电压,超低功耗CMOS静态RAM [512K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM]
分类和应用:
文件页数/大小: 14 页 / 85 K
品牌: ISSI [ INTEGRATED SILICON SOLUTION, INC ]
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®
IS62WV5128ALL, IS62WV5128BLL  
ISSI  
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)  
55 ns  
70 ns  
Symbol  
tRC  
Parameter  
Min. Max.  
Min.  
Max.  
Unit  
Read Cycle Time  
Address Access Time  
Output Hold Time  
CS1 Access Time  
OE Access Time  
OE to High-Z Output  
OE to Low-Z Output  
CS1 to High-Z Output  
CS1 to Low-Z Output  
55  
10  
5
55  
55  
25  
20  
20  
70  
10  
5
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tAA  
70  
tOHA  
tACS1  
tDOE  
70  
35  
25  
(2)  
tHZOE  
(2)  
tLZOE  
tHZCS1  
0
0
25  
tLZCS1  
10  
10  
Notes:  
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V/1.5V, input pulse levels of 0.4 to  
VDD-0.2V/VDD-0.3V and output loading specified in Figure 1.  
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.  
AC WAVEFORMS  
READ CYCLE NO. 1(1,2) (Address Controlled) (CS1 = OE = VIL, WE = VIH)  
t
RC  
ADDRESS  
t
AA  
t
OHA  
t
OHA  
DATA VALID  
DOUT  
PREVIOUS DATA VALID  
6
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. A  
04/30/03