IS93C46A
1,024-BIT SERIAL ELECTRICALLY
ERASABLE PROM
FEATURES
• Industry-standard Microwire Interface
— Non-volatile data storage
— Low voltage operation:
Vcc = 2.5V to 5.5V
— Full TTL compatible inputs and outputs
— Auto increment for efficient data dump
• User Configured Memory Organization
— By 16-bit or by 8-bit
• Hardware and software write protection
— Defaults to write-disabled state at power-up
— Software instructions for write-enable/disable
• Enhanced low voltage CMOS E
2
PROM
technology
• Versatile, easy-to-use Interface
— Self-timed programming cycle
— Automatic erase-before-write
— Programming status indicator
— Word and chip erasable
— Chip select enables power savings
• Durable and reliable
— 40-year data retention after 1M write cycles
— 1 million write cycles
— Unlimited read cycles
— Schmitt-trigger inputs
ISSI
JUNE 2004
DESCRIPTION
The IS93C46A is a low-cost 1kb non-volatile,
ISSI
®
serial EEPROM. It is fabricated using an
enhanced CMOS design and process. The
IS93C46A contains power-efficient read/write
memory, and organization of 128 bytes of 8 bits
or 64 words of 16 bits. When the ORG pin is
connected to Vcc or left unconnected, x16 is
selected; when it is connected to ground, x8 is
selected. The IS93C46A is fully backward
compatible with IS93C46.
®
An instruction set defines the operation of the
devices, including read, write, and mode-enable
functions. To protect against inadvertent data
modification, all erase and write instructions are
accepted only while the device is write-enabled. A
selected x8 byte or x16 word can be modified with
a single WRITE or ERASE instruction.
Additionally, the two instructions WRITE ALL or
ERASE ALL can program the entire array. Once
a device begins its self-timed program procedure,
the data out pin (Dout) can indicate the READY/
BUSY
status by raising chip select (CS). The self-
timed write cycle includes an automatic erase-
before-write capability. The device can output any
number of consecutive bytes/words using a single
READ instruction.
FUNCTIONAL BLOCK DIAGRAM
DUMMY
BIT
R/W
AMPS
INSTRUCTION
DECODE,
CONTROL,
AND
CLOCK
GENERATION
ADDRESS
REGISTER
ADDRESS
DECODER
EEPROM
ARRAY
128x8
64x16
DATA
REGISTER
D
IN
INSTRUCTION
REGISTER
D
OUT
CS
SK
WRITE
ENABLE
HIGH VOLTAGE
GENERATOR
Copyright © 2004 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. E
06/07/04
1
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
