IS93C46-3
1,024-BIT SERIAL ELECTRICALLY
ERASABLE PROM
FEATURES
• State-of-the-art architecture
— Non-volatile data storage
— Low voltage operation:
3.0V (Vcc = 2.7V to 6.0V)
— Full TTL compatible inputs and outputs
— Auto increment for efficient data dump
• Low voltage read operation
— Down to 2.7V
• Hardware and software write protection
— Defaults to write-disabled state at power-up
— Software instructions for write-enable/disable
• Advanced low voltage CMOS E
2
PROM
technology
• Versatile, easy-to-use Interface
— Self-timed programming cycle
— Automatic erase-before-write
— Programming status indicator
— Word and chip erasable
— Stop SK anytime for power savings
• Durable and reliable
— 10-year data retention after 100K write cycles
— 100,000 write cycles
— Unlimited read cycles
ISSI
OVERVIEW
®
MARCH 2001
The IS93C46-3 is a low cost 1,024-bit, non-volatile, serial
E
2
PROM. It is fabricated using
ISSI’s
advanced CMOS
E
2
PROM technology. The IS93C46-3 provides efficient
non-volatile read/write memory arranged as 64 registers
of 16 bits each. Seven 9-bit instructions control the
operation of the device, which includes read, write, and
mode enable functions. The data out pin (D
OUT
) indicates
the status of the device during in the self-timed non-
volatile programming cycle.
The self-timed write cycle includes an automatic erase-
before-write capability. To protect against inadvertent
writes, the WRITE instruction is accepted only while the
chip is in the write enabled state. Data is written in 16 bits
per write instruction into the selected register. If Chip
Select (CS) is brought HIGH after initiation of the write
cycle, the Data Output (D
OUT
) pin will indicate the READY/
BUSY
status of the chip.
APPLICATIONS
The IS93C46-3 is ideal for high-volume applications
requiring low power and low density storage. This device
uses a low cost, space saving 8-pin package. Candidate
applications include robotics, alarm devices, electronic
locks, meters and instrumentation settings.
FUNCTIONAL BLOCK DIAGRAM
D
IN
INSTRUCTION
REGISTER
(9 BITS)
INSTRUCTION
DECODE,
CONTROL,
AND
CLOCK
GENERATION
DATA
REGISTER
(16 BITS)
DUMMY
BIT
R/W
AMPS
D
OUT
CS
ADDRESS
REGISTER
1 OF 64
DECODER
EEPROM
ARRAY
(64 X 16)
SK
WRITE
ENABLE
HIGH VOLTAGE
GENERATOR
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. G
04/26/01
1
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
