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CPC5002GSTR 参数 Datasheet PDF下载

CPC5002GSTR图片预览
型号: CPC5002GSTR
PDF下载: 下载PDF文件 查看货源
内容描述: 双高速漏极开路 [Dual High-Speed Open-Drain]
分类和应用:
文件页数/大小: 14 页 / 1623 K
品牌: IXYS [ IXYS CORPORATION ]
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CPC5002  
INTEGRATED  
C
IRCUITS  
D
IVISION  
4.2 Application Example  
Shown below is an example of an isolated POE Controller SMBus where the SDA signal has been split into separate  
SDA and SD signals on the isolated slave side of the barrier. In this example, the low power SMBus master, not  
IN  
OUT  
shown, requires a buffer (U3) capable of driving the CPC5002 input LEDs. Although selection of the appropriate  
buffer is determined by the product definition and the ability to drive the LED’s, it is recommended the buffer have  
Schmitt trigger inputs to ensure clean bounce-free LED drive signals. A high power SMBus master with the ability to  
sink 4mA of pullup current may not require a buffer to drive the CPC5002 inputs. In this example, the POE Controllers  
2
are specified as SMBus high power and I C compatible. This enables the POE Controllers to drive the CPC5002  
LEDs directly without the need of an external buffer.  
Circuit design of the SMBus physical layer using the CPC5002 consists of two parts, one being the LED input drive  
current and the other being the buffered galvanically isolated logic output signals.  
The following design constraints are assumed for this example:  
Supply Voltages: V  
= 3.0V to 3.6V  
I 4mA for U3 and the POE Controllers  
DDx  
OL  
Ambient Temperature: T = 0°C to 70°C  
Resistors:  
A
Tolerance = 1%  
Temperature Coefficient = 100ppm  
V 0.4V for U3 and the POE Controllers  
OL  
Figure 3. Optically isolated SMBus for POE Controllers with Separate SDA and SDA  
Pins  
IN  
OUT  
U1  
3.3VDDS  
3.3VDDM  
CPC5002  
1
2
3
4
8
SMBus  
POE  
3.3VDDS  
R5  
U3  
R1  
806Ω  
Controllers  
7
511Ω  
SCLM  
SDAM  
SCL  
SDAIN  
INT  
3.3VDDS  
R2  
806Ω  
R6  
SDAOUT  
511Ω  
6
5
3.3VDDS  
0.1μF  
GNDS  
3.3VDDM  
0.1μF  
GNDM  
U2  
3.3VDDS  
3.3VDDM  
CPC5002  
8
7
1
2
3
4
SCL  
SDAIN  
INT  
3.3VDDS  
3.3VDDM  
R7  
R3  
806Ω  
R9*  
SDAOUT  
10k  
INTM  
3.3VDDS  
3.3VDDM  
R4  
806Ω  
R10*  
R8  
10k  
6
5
R9 and R10 are not required for this design.  
See text for explanation.  
*
3.3VDDS  
3.3VDDM  
0.1μF  
GNDM  
0.1μF  
GNDS  
To minimize pulse width distortion of the output signal, the input LED drive current needs to be set at the lower end of  
it’s operational range. Because the forward voltage of the LED has a negative temperature coefficient this will occur at  
the minimum operating temperature point with the minimum supply voltage. With V = 3.0V and V = 1.442V at  
DD  
F
T = 0°C and I = 1.4mA, the calculated maximum value for the series input resistor R is 826.8. Taking tolerance  
A
F
S
and value change due to temperature into account, the nearest E96 standard value sets R = 806. Using  
S
V
= 0.25V and V  
= 0.1V and calculating for the LED current range over the specified operating  
OL_Nominal  
OL_Minimum  
conditions with R = 806, the LED input current I will be 1.455mA to 3.212mA. At nominal operating conditions with  
S
F
T = 25°C, the nominal LED input current is: I  
= 2.28mA.  
A
F_Nominal  
10  
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