IXBD4410
IXBD4411
terminals (C7, C11), and an output
reservoir capacitor between V
EE
and
GND (C10, C14). A 0.1
µF
charge
pump capacitor (C7, C11) is recom-
mended. The voltage regulation
method used in the IXBD4410/4411
allows a 1 to 2 V ripple frequency
depends on the size of the V
EE
output
reservoir capacitor (C10, C14) and the
average load current. The minimum
recommended output reservoir (C10,
C14) is 4.7
µF
tantalum, or 10
µF
if
aluminium electrolytic construction is
chosen. Note that this reservoir
capacitor is in addition to a good
quality high frequency bypass capaci-
tor (0.1
µF)
that should be placed from
VEE to GND (C9, C13).
A small resistor in series with the
charge pump capacitor, (R7, R8)
reduces the peak charging currents of
the charge pump. A value or 68
Ω
or
greater is recommended, as illustrated
in the applications example in Fig. 6.
Current Sense / Desaturation
Detection Circuit
All members of the ISOSMART™
driver family provide a very flexible
overcurrent/short circuit protection
capability that works with both standard
three-terminal power transistors, and
with 4- and 5-terminal current sensing
power devices. Overcurrent detection
is accomplished as illustrated in Fig. 7a
(for a current mirror power device) and
Fig. 7b (for a standard three terminal
power transistor). Desaturation
detection is accomplished with the
same internal circuits by measuring the
voltage across the power transistor in
the on-state with an external resistor
divider (Fig. 7c).
The IM input trip point V
TIM
, typically
300 mV, is referenced to the Kelvin
ground pin KG.
Current Mirror MOSFET and IGBT allow
good control of peak let-through
currents and excellent short circuit
protection when combined with the
ISOSMART™ driver family of devices.
The sense resistor is chosen to
develop 300 mV at the desired peak
transistor current, assuming a mirror
ration of 1400:1, and a trip point of 30
A is desired:
R
s
= 300 mV • 1400/30 A = 14
Ω
(use 15
Ω
CC).
It is important to realize that C
oss
per
a
b
c
IM
R
s
IM
R
s
IM
R
s
KG
GND
With Current Mirror
KG
GND
With Standard
MOSFET/IGBT
KG
GND
Desaturation Detection
with Standard
MOSFET/IGBT
Fig. 7: Alternative overcurrent protection circuits
unit area of the mirror cells is much
larger that C
oss
per unit area of the bulk
of the chip due to periphery effects.
This causes a large transient current
pulse at the mirror output whenever the
transistor switches (C • dv/dt currents),
which can cause false overcurrent
trigger. The RC filter indicated in Fig.
7a will eliminate this problem.
Standard three-terminal MOSFET and
IGBT devices (in discrete as well as
modern industrial single transistor and
phase-leg modules) can also be
protected from short circuit with the
ISOSMART™ driver family devices. In
discrete device designs, where the
source/emitter terminal is available,
overcurrent protection with an external
power resistor can be implemented.
The resistor is placed in series with the
device emitter, with the full device
current flowing through it (Fig. 7b). The
sense resistor is again selected to
develop 300 mV at the desired peak
transistor current, assuming a trip point
of 30 A is desired:
R
s
= 300 mV / 30 A = 10 mΩ
(use 10 mΩ, noninductive
current sense resistor).
It is important to recognize that
"noninductive" is a relative term,
especially when applied to current
sense resistor construction and
characterization. There is always
significant series inductance inserted
with the sense resistor, and L • di/dt
voltage transients can cause false
overcurrent trigger.
The RC filter indicated in Figure 7b will
eliminate this problem. Choosing the
RC pole at the current sense resistor
RL zero should exactly compensate for
series inductance. Because the exact
value is not normally known (and can
vary depending on PC layout and
component lead dress) this is not
normally a good idea. Usually, the RC
time constant should be two to ten
times longer than the suspected RL
time constant.
Desaturation detection as in Figure 7c
is probably the most common method
of short circuit protection in use today.
While not strictly an "overcurrent"
detector, if the power transistor gain,
and consequently short circuit let-
through current, is well controlled (as
with modern MOSFET and IGBT) this
methodology offers very effective
protection.
The IXBD4410/4411 half-bridge circuits
in Fig. 6 uses desaturation detection. In
Fig. 6, the voltage across the two
power MOSFET devices (or IGBTs) are
monitored by two sets of voltage-
divider networks, R10 and R11 for the
high-side gate driver, and R13 and R14
for the low-side gate driver. The
dividers are set to trip the IM input
comparators when either Power
MOSFET device V
DS
exceeds a
reasonable value, perhaps 50 V
(usually a value of 10 % of the nominal
DC bus voltage works well). R10 or
R13 are chosen to tolerate the applied
steady state DC bus voltage at an
acceptable power dissipation.
Dielectric withstand capability, power
handling, temperature rise, and PC
board creep and strike spacings, must
all be carefully considered in the
design of the voltage-divider networks.
In the off-state, the voltage across the
Power MOSFET device may go as high
as the DC bus potential. To keep this
normal condition from setting the
internal fault flip-flop of the IXBD4410
or the IXBD4411, an internal CMOS
switch is turned on and placed across
lM and KG pins shorting them together.
This effectively discharges C8 or C12
in Fig. 6 and maintains zero potential
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