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500X15W223MV4E 参数 Datasheet PDF下载

500X15W223MV4E图片预览
型号: 500X15W223MV4E
PDF下载: 下载PDF文件 查看货源
内容描述: X2Y®过滤和去耦电容 [X2Y® FILTER & DECOUPLING CAPACITORS]
分类和应用: 电容器固定电容器联轴器LTE
文件页数/大小: 8 页 / 1220 K
品牌: JOHANSON [ JOHANSON TECHNOLOGY INC. ]
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S
OLDER
P
AD
R
ECOMMENDATIONS
0402 (X07)
IN
X
Y
G
V
U
Z
0.020
0.020
0.024
0.015
0.039
0.064
mm
0.51
0.51
0.61
0.38
0.99
1.63
0603 (X14)
IN
0.035
0.025
0.040
0.020
0.060
0.090
mm
0.89
0.64
1.02
0.51
1.52
2.29
0805 (X15)
IN
0.050
0.035
0.050
0.022
0.080
0.120
mm
1.27
0.89
1.27
0.56
2.03
3.05
1206 (X18)
IN
0.065
0.040
0.080
0.040
0.120
0.160
mm
1.65
1.02
2.03
1.02
3.05
4.06
1210 (X41)
IN
0.100
0.040
0.080
0.045
0.160
0.160
mm
2.54
1.02
2.03
1.14
4.06
4.06
1410 (X44)
IN
0.100
0.040
0.100
0.045
0.160
0.180
mm
2.54
1.02
2.54
1.14
4.06
4.57
1812 (X43)
IN
0.125
0.040
0.130
0.045
0.190
0.210
mm
3.18
1.02
3.30
1.14
4.83
5.33
Y
X
Z
V
V
U
V
V
G
Use of solder mask beneath component is not recommended because of flux/contaminant entrapment.
O
PTIMIZING
X2Y P
ERFORMANCE ON THE
PCB
X2Y capacitors deliver excellent performance in EMI/RFI filtering and Power Bypass applications. Physical and electrical placement
on the PCB is critical in achieving good results. A low inductance, dual ground connection is mandatory.
EMI Filter Applications
Low inductance PCB routing examples are shown in figures 1 and 2. Figures 3-5 show unbalanced and high
inductance connections and should be avoided. See detailed application note
X2Y EMI FIlter Evaluation and PCB Design Guidelines.
Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
PDN / Power Bypass Applications
Figures on right compare the X2Y
recommended layout against a poor layout. Because of its long extents from
device terminals to vias, and the wide via separation, the poor layout exhibits
approximately 200% L1 inductance, and 150% L2 inductance compared to
recommended X2Y layouts. See detailed application note
X2Y Power Bypass
Mounting.
Recommended X2Y
Bypass Layout
L
AB
E
VALUATION
S
OLDERING
P
RECAUTIONS
Ceramic capacitors (X2Y and standard MLC types) can be easily damaged when hand soldered. Thermal cracking of the ceramic
body is often invisible even under a microscope. Factors that increase thermal cracking risk:
1. 4 terminals to solder can increase hand-soldering time and temperature exposure
2. Pb-free solders have higher reflow temperatures
3. Low inductance connections to ground are inherently good heat-sinks
A damaged component may exhibit a short circuit immediately and not recover, or may operate with intermittent Insulation Resistance
(IR) levels. If you are not achieving expected results and have followed the other guidelines carefully, check to see you are adhering to
the soldering guidelines below:
• Always pre-heat the PCB and component to within 50°C of solder reflow temperature at 2°C/sec. maximum.
• Use contact-less hand solder tools such as a hot air pencil, IR lamp, etc.
• Avoid over-heating of the ceramic component, temperature limit: 260°C for 20-30 seconds max.
• Use a soldering iron as last resort; 20W max. tip, NO CONTACT with ceramic, limit solder time to 5 seconds max.
A reliable, cost effective prototype PCB reflow soldering process is possible using a household toaster oven. There are several good
procedures available on-line by googling “Toaster Oven Soldering”
6
www.johanson dielectrics.com