Website: www.kingtronics.com
Email: info@kingtronics.com
Tel: (852) 8106 7033
Fax: (852) 8106 7099
LKT
Low Voltage Multilayer Chip Ceramic
Capacitor
7. Temperature Coefficient of Capacitance
Dielectrics
Specification
NPO
Temperature coefficient within ±30ppm/℃
Cp drift within ±0.2% or ±0.05pF
Testing Condition
Measure capacitance under follow table list temperature:
STEP
NPO, X7R
X5R
Y5V
1
25 ±2
25 ±2
25 ±2
2
-55±3
-55±3
-30±3
3
25 ±2
25 ±2
25 ±2
4
125±3
85±3
85±3
5
25 ±2
25 ±2
25 ±2
1) NPO
The capacitance drift is calculated by dividing the
differences between the maximum and minimum measured
values in the step 1,3 and 5.
The temperature coefficient is determined using the
Capacitance measured in step 3 as a reference.
2) X7R ,X5R and Y5V
The ranges of capacitance change compared within the
above 25
℃
value over the temperature ranges shall be
within the specified ranges.
X7R/X5R
Capacitance change within ±15%
Y5V
Capacitance change within +22%, -82%
8. Adhesion
Dielectrics
Specification
Testing Condition
The pressurizing force shall be 10N (=1000g*f) and the
duration of application shall be 10±1sec.
hooked
jig
board
NPO
X7R/X5R
Y5V
No removal of the terminations or other
defect shall occur.
r=0.5
hip
cross-section
9. Solderability of Termination
Dielectrics
Specification
NPO
X7R/X5R
Y5V
10. Resistance to leaching
Dielectrics
NPO
X7R/X5R
Y5V
95% min. coverage of both terminal
electrodes and less than 5% have pin holes
or rough spots.
Testing Condition
Solder temperature: 230±5℃
Dipping time: 2±1 seconds.
Completely soak both terminal electrodes in solder
Specification
95% min. coverage of both terminal
electrodes and less than 5% have pin holes
or rough spots.
No remarkable visual damage.
Testing Condition
Solder temperature: 270±5℃
Dipping time: 10±1 seconds.
Completely soak both terminal electrodes in solder
4