SPM0423HD4H-WB
Parameter
SELECT (high)
Symbol
Conditions
Min
Typ
Max
3.6
0.2
10
Units
VDD -0.2
-
-
V
SELECT (low)
Short Circuit Current
Output Load
-0.3
V
ISC
Grounded DATA pin
-
-
1
-
mA
pF
CLOAD
FCLOCK
100
3.25
60
Clock Frequency
Clock Duty Cycle
Clock Rise/Fall Time
Fall-asleep Time4,5
Wake-up Time4,6
1.0
40
-
-
MHz
%
-
tEDGE
-
10
ns
FCLOCK < 1 kHz
FCLOCK ≥ 1 MHz
-
-
10
ms
ms
-
-
10
No load for min tDV
Max CLOAD for max tDV
Delay Time for Valid
Data
tDV
tDZ
18
0
-
-
60
16
ns
ns
Delay Time for High Z
1 100% tested.
2 IDD varies with CLOAD according to: ΔIDD = 0.5*VDD*ΔCLOAD*FCLOCK
.
3 Maximum specifications are measured at maximum VDD. Typical specifications are measured at standard test
conditions.
4 Valid microphones states are: Powered Down Mode (mic off), Sleep Mode (low current, DATA = high-Z, fast startup),
and Active Mode (normal operation).
5 Time from FCLOCK < 1 kHz to ISLEEP specification is met when transitioning from Active Mode to Sleep Mode.
6 Time from FCLOCK ≥ 1 MHz to all applicable specifications are met when transitioning from Sleep Mode to Active Mode.
Revision: C
2/28/2013
Sheet 3 of 13
©2013 Knowles Electronics
KNOWLES [ KNOWLES ELECTRONICS ]
