CMOS / 3.3V / 7.0×5.0A
Clock Crystal Oscillators
Surface Mount Type
K50H-3C
Series
Features
• Miniature ceramic package
• Highly reliable with seam welding
• CMOS output
• Supply voltage V
DD
=3.3V
• Internal Bypass Capacitor
• Low Jitter
•
±25ppm
available
How to Order
K50H-3C 0 - S E 125.000
q
w er
t
qType(7×5
SMD, 3.3V)
wFrequency
Stability Code(See Table1)
eDuty
Ratio(S: 45% to 55% STD)
rEnable/Disable
Function(STD)
tOscillation
Frequency(Ex.: 125.000MHz)
Packaging(Tape & Reel 1,000pcs/reel)
Table 1
Stability
T
OPR
(°C)
Code (ppm)
0
±
50
S
±
30
−10
to
+70
(Standard)
U
±
25
F
±100 −40
to
+85
(Extend)
G
±
50
Note
Standard specifications
With only certain
frequencies
With only certain
frequencies
Pb Free
RoHS Conforming
Specifications
Item
Output Frequency Range
Frequency Stability
Storage Temperature Range
Operating Temperature Range
Max. Supply Voltage
Supply Voltage
Current Consumption
(Maximum Loaded)
Duty Ratio(Symmetry)
Duty Ratio(Symmetry)
Rise/Fall Time
(10% V
DD
to 90% V
DD
Maximum Loaded)
Output Voltage-"L"
Output Voltage-"H"
Output Load
Input Voltage Range
Input Voltage-"L"
Input Voltage-"H"
Output Disable Time
Output Enable Time
Start-up Time
Deterministic Jitter pk-pk
1Sigma jitter
Symbol
F
OUT
F
SBY
T
STG
T
OPR
-----
V
DD
Stability:
±50ppm, ±100ppm
(Ext Temp)
Stability:
±25ppm, ±30ppm, ±50ppm
(Ext Temp)
Conditions
Overall conditions:
initial tolerance, operating temperature range, rated
power supply voltage change, load change, aging(1year
@25°C), shock and vibration
Standard
Extend(option)
I
DD
I
ST
SYM
Tr/Tf
50≤F
OUT
≤
85MHz
85<F
OUT
≤100MHz
100<F
OUT
≤135MHz
135<F
OUT
≤160MHz
Standby Function
@50% V
DD
50≤F
OUT
<100MHz
100≤F
OUT
≤160MHz
20% V
DD
to 80% V
DD
10% V
DD
to 90% V
DD
20% V
DD
to 80% V
DD
10% V
DD
to 90% V
DD
V
OL
V
OH
CL
V
IN
V
IL
V
IH
-----
-----
ST
DJ
1sigma
CMOS
@Minimum operating Voltage to be 0sec.
Measured with "Wavecrest DTS-2079",
VISI 6.3.1
Min.
50
−25
−30
−50
−55
−10
−40
−0.5
2.97
3.14
-----
-----
-----
-----
-----
45
-----
-----
-----
-----
-----
90% V
DD
-----
0
-----
70% V
DD
-----
-----
-----
-----
-----
Max.
170
+25
+30
+50
+125
+70
+85
7.0
3.63
3.46
30
40
50
60
10
55
3.5
5.0
1.5
2.0
10% V
DD
-----
15
V
DD
30% V
DD
-----
5
150
10
2
4
Units
MHz
ppm
°C
Volt
mA
µA
%
nS
Volt
pF
Volt
Volt
mS
nS
mS
psec
Note: Please contact us for inquires about extended operating temperature range, available frequencies and other conditions.
All electrical characteristics are defined at the maximum load and operating temperature range.
Dimensions
7.0
1.4
0.6
(Unit : mm)
Recommended Land Pattern
5.08
2.0
(Unit : mm)
e
5.0
1.1
r
2.6
w
q
1.8
0.7
5.08
1.6
Pin Connections
q
Control
w
Case GND
e
Output
r
V
DD
Enable/Disable Function
Pin1
Pin3(Output)
Open
Active
"H" Level
Active
"L" Level High Z(No-Oscillation)
Note: K50H Series has Bypass Capacitor of 0.01µF
between V
DD
and GND.
4.2
Plating: Ni+Au
Tolerance:
±0.2
KSS [ Kyocera Kinseki Corpotation ]
