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GAL22LV10D-5LJ 参数 Datasheet PDF下载

GAL22LV10D-5LJ图片预览
型号: GAL22LV10D-5LJ
PDF下载: 下载PDF文件 查看货源
内容描述: 低压E2CMOS PLD通用阵列Logic⑩ [Low Voltage E2CMOS PLD Generic Array Logic⑩]
分类和应用: 可编程逻辑器件输入元件时钟
文件页数/大小: 18 页 / 218 K
品牌: LATTICE [ LATTICE SEMICONDUCTOR ]
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Specifications
GAL22LV10D
Specifications
GAL22LV10
AC SWITCHING CHARACTERISTICS
Over Recommended Operating Conditions
COM
PARAMETER
COM
TEST
COND
1
.
A
A
A
DESCRIPTION
Input or I/O to Combinational Output
Clock to Output Delay
Clock to Feedback Delay
Setup Time, Input or Feedback before Clock↑
Hold Time, Input or Feedback after Clock↑
Maximum Clock Frequency with
External Feedback, 1/(tsu + tco)
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
Maximum Clock Frequency with
No Feedback
Clock Pulse Duration, High
Clock Pulse Duration, Low
Input or I/O to Output Enabled
Input or I/O to Output Disabled
Input or I/O to Asynchronous Reset of Register
Asynchronous Reset Pulse Duration
Asynchronous Reset to Clock↑ Recovery Time
Synchronous Preset to Clock↑ Recovery Time
1
1
3
0
-4
-5
UNITS
MIN. MAX. MIN. MAX.
t
pd
2
t
co
2
t
cf
3
t
su
t
h
4
3
2.5
1
1
3.5
0
143
5
3.5
3
ns
ns
ns
ns
ns
MHz
167
f
max
4
A
A
182
250
154
200
MHz
MHz
t
wh
4
t
wl
4
t
en
t
dis
t
ar
t
arw
t
arr
t
spr
1)
2)
3)
4)
B
C
A
2
2
1
1
1
4.5
3.5
3.5
5
5
4.5
2.5
2.5
1
1
1
5.5
4
4
6
6
5.5
ns
ns
ns
ns
ns
ns
ns
ns
Refer to
Switching Test Conditions
section.
Minimum values for
t
pd and
t
co are not 100% tested but established by characterization.
Calculated from
fmax
with internal feedback. Refer to
fmax Descriptions
section.
Refer to
fmax Descriptions
section. Characterized but not 100% tested.
CAPACITANCE (T
A
= 25
°
C, f = 1.0 MHz)
SYMBOL
C
I
C
I/O
PARAMETER
Input Capacitance
I/O Capacitance
TYPICAL
5
5
UNITS
pF
pF
TEST CONDITIONS
V
CC
= 3.3V, V
I
= 0V
V
CC
= 3.3V, V
I/O
= 0V
7